Abstract: An electronic device and a heat dissipation structure thereof are provided. The electronic device comprises a first shell body; a second shell body, mutually pivoted with the first shell body; and a heat dissipation structure, including a first heat conducting member and a second heat conducting member, wherein the first heat conducting member is disposed in the first shell body and extended with a first arc-shaped piece, the second heat conducting member is disposed in the second shell body and extended with a second arc-shaped piece, and the second arc-shaped piece is arranged to be thermally in contact with the first arc-shaped piece and capable of sliding and rotating relative to the first arc-shaped piece. Accordingly, thermal energy can be transferred from the shell body having a heat unit to the other shell body, thereby increasing the heat dissipation efficiency of the electronic device.

Abstract: A heat sink clip device, configured to secure a heat sink to a heat generating unit, the heat sink clip comprises a thermal conductive board and a plurality of locking members. The thermal conductive board is attached to the heat generating unit. The thermal conductive board may include a plurality of connecting apertures. Each connecting aperture may include a bigger diameter portion and a smaller diameter portion connected with the bigger diameter portion. A plurality of locking members may be engaged with the corresponding connecting aperture. Each locking members may include a threaded member and an elastic unit sheathed on the threaded member. The threaded member may include a bar portion, a head portion and a blocking ring. The head portion and the blocking ring are respectively on both sides of the bar portion. The diameter of the bar portion may be a little bit smaller than the size of the smaller diameter portion.

Abstract: A method for fabricating polysilicon film is disclosed. First, a first substrate is provided, wherein a plurality of sunken patterns has been formed on the front surface of the first substrate. Then, a second substrate is provided and an amorphous polysilicon film is formed on the second substrate. Next, the amorphous polysilicon film formed on the second substrate is in contact with the front surface of the first substrate. The amorphous polysilicon film is transferred into a polysilicon film by performing an annealing process. Then, the first substrate and the second substrate are separated from each other. This method reduces the cost and the time for fabricating polysilicon film.

Abstract: A method for fabricating polysilicon film is disclosed. First, a first substrate is provided, wherein a plurality of sunken patterns has been formed on the front surface of the first substrate. Then, a second substrate is provided and an amorphous polysilicon film is formed on the second substrate. Next, the amorphous polysilicon film formed on the second substrate is in contact with the front surface of the first substrate. The amorphous polysilicon film is transferred into a polysilicon film by performing an annealing process. Then, the first substrate and the second substrate are separated from each other. This method reduces the cost and the time for fabricating polysilicon film.

Abstract: A method of forming a thin film transistor is provided. First, an amorphous silicon layer is formed on a substrate. Next, a first gate insulating layer is formed on the amorphous silicon layer. Then, an annealing process is performed so that the amorphous silicon layer is melted and re-crystallized to form a poly silicon layer. Next, the first insulating layer and the poly silicon layer are patterned to form an island. Then, a gate electrode is formed on the island. Finally, a source region and a drain region are formed inside the poly silicon layer of the island. After the annealing process is performed, the boundary between the poly silicon layer and the gate insulating layer becomes denser, so that the current leakage of the thin film transistor can be reduced.

Abstract: A method for manufacturing a thin film transistor is provided. First, a poly-silicon island is formed on a substrate. Then, a patterned gate dielectric layer and a gate are formed on the poly-silicon island. Next, a source/drain is formed in the poly-silicon island beside the gate, wherein the region between the source/drain is a channel. Furthermore, a metal layer is formed on the substrate to cover the gate, the patterned gate dielectric layer and the poly-silicon island. Moreover, the metal layer above the source/drain will react with the poly-silicon island to form a silicide layer. Then, the non-reacted metal layer is removed. Afterwards, an inter-layer dielectric (ILD) is formed to cover the substrate. Then, the inter-layer dielectric above the source/drain is removed to form a source/drain contacting hole, wherein the silicide layer is used as an etching stopper.

Abstract: A method is disclosed to make a lightly doped drain of a low-temperature poly-silicon thin film transistor. Nitrogen is implanted during steps of doping the source and the drain so as to suppress the spreading of the other types of dope so that the poly-silicon layer forms a shallow interface lightly doped drain after annealing. Implantation of nitrogen takes place before or after the other types of dope. Nitrogen is implanted to a depth no greater than that of the other types of dope. The present is simple, improves hot carrier effect and repairs flaws in the poly-silicon layer.

Abstract: A substrate comprises at least a semi-finished substrate, a circuit line, a contact and a solder mask layer. The circuit line and the contact are formed on the semi-finished substrate. The circuit line and the contact are connected together non-integrally. The solder mask layer is formed over the semi-finished substrate to cover the circuit line. The solder mask layer has an opening in which the contact is formed.

Abstract: A substrate comprises at least a semi-finished substrate, a circuit line, a contact and a solder mask layer. The circuit line and the contact are formed on the semi-finished substrate. The circuit line and the contact are connected together non-integrally. The solder mask layer is formed over the semi-finished substrate to cover the circuit line. The solder mask layer has an opening in which the contact is formed.