Abstract: In some embodiments, the present disclosure relates to an integrated circuit (IC) in which a memory structure comprises an inhibition layer inserted between two ferroelectric layers to create a tetragonal-phase dominant ferroelectric structure. In some embodiments, the ferroelectric structure includes a first ferroelectric layer, a second ferroelectric layer overlying the first ferroelectric layer, and a first inhibition layer disposed between the first and second ferroelectric layers and bordering the second ferroelectric layer. The first inhibition layer is a different material than the first and second ferroelectric layers.

Abstract: An adapter board assembly includes a board member installed in one slot of a motherboard of an electronic apparatus and having arranged thereon a plurality of electronic devices, signal input ports and signal output ports, a metal frame fixedly provided at one side of the board member for affixing the board member to a rack inside the electronic apparatus to stabilize the positioning of the board member, and a control circuit electrically connected with the signal input ports and the signal output ports for converting a first format of each external signal being inputted into one signal input port into a second format for output through one corresponding signal output port.