Patents by Inventor Po-Chin Kuo
Po-Chin Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10020230Abstract: A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from the semiconductor fin by the gate dielectric layer. The gate electrode includes a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer. The top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function.Type: GrantFiled: October 3, 2016Date of Patent: July 10, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chin Kuo, Hsien-Ming Lee
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Publication number: 20170025312Abstract: A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from the semiconductor fin by the gate dielectric layer. The gate electrode includes a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer. The top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function.Type: ApplicationFiled: October 3, 2016Publication date: January 26, 2017Inventors: Po-Chin Kuo, Hsien-Ming Lee
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Patent number: 9472638Abstract: A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from the semiconductor fin by the gate dielectric layer. The gate electrode includes a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer. The top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function.Type: GrantFiled: August 13, 2015Date of Patent: October 18, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chin Kuo, Hsien-Ming Lee
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Patent number: 9293334Abstract: An N work function metal for a gate stack of a field effect transistor (FinFET) and method of forming the same are provided. An embodiment FinFET includes a fin supported by a semiconductor substrate, the fin extending between a source and a drain and having a channel region, and a gate stack formed over the channel region of the fin, the gate stack including an N work function metal layer comprising an oxidation layer on opposing sides of a tantalum aluminide carbide (TaAlC) layer.Type: GrantFiled: March 26, 2015Date of Patent: March 22, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chin Kuo, Chung-Liang Cheng, Hsien-Ming Lee, Weng Chang
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Publication number: 20150349080Abstract: A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from the semiconductor fin by the gate dielectric layer. The gate electrode includes a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer. The top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function.Type: ApplicationFiled: August 13, 2015Publication date: December 3, 2015Inventors: Po-Chin Kuo, Hsien-Ming Lee
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Patent number: 9123746Abstract: A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from the semiconductor fin by the gate dielectric layer. The gate electrode includes a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer. The top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function.Type: GrantFiled: September 9, 2014Date of Patent: September 1, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chin Kuo, Hsien-Ming Lee
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Publication number: 20150200100Abstract: An N work function metal for a gate stack of a field effect transistor (FinFET) and method of forming the same are provided. An embodiment FinFET includes a fin supported by a semiconductor substrate, the fin extending between a source and a drain and having a channel region, and a gate stack formed over the channel region of the fin, the gate stack including an N work function metal layer comprising an oxidation layer on opposing sides of a tantalum aluminide carbide (TaAlC) layer.Type: ApplicationFiled: March 26, 2015Publication date: July 16, 2015Inventors: Po-Chin Kuo, Chung-Liang Cheng, Hsien-Ming Lee, Weng Chang
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Patent number: 9064857Abstract: An N work function metal for a gate stack of a field effect transistor (FinFET) and method of forming the same are provided. An embodiment FinFET includes a fin supported by a semiconductor substrate, the fin extending between a source and a drain and having a channel region, and a gate stack formed over the channel region of the fin, the gate stack including an N work function metal layer comprising an oxidation layer on opposing sides of a tantalum aluminide carbide (TaAlC) layer.Type: GrantFiled: December 19, 2012Date of Patent: June 23, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chin Kuo, Chung-Liang Cheng, Hsien-Ming Lee, Weng Chang
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Publication number: 20140377944Abstract: A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from the semiconductor fin by the gate dielectric layer. The gate electrode includes a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer. The top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function.Type: ApplicationFiled: September 9, 2014Publication date: December 25, 2014Inventors: Po-Chin Kuo, Hsien-Ming Lee
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Patent number: 8907431Abstract: A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from the semiconductor fin by the gate dielectric layer. The gate electrode includes a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer. The top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function.Type: GrantFiled: December 16, 2011Date of Patent: December 9, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chin Kuo, Hsien-Ming Lee
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Publication number: 20140167187Abstract: An N work function metal for a gate stack of a field effect transistor (FinFET) and method of forming the same are provided. An embodiment FinFET includes a fin supported by a semiconductor substrate, the fin extending between a source and a drain and having a channel region, and a gate stack formed over the channel region of the fin, the gate stack including an N work function metal layer comprising an oxidation layer on opposing sides of a tantalum aluminide carbide (TaAlC) layer.Type: ApplicationFiled: December 19, 2012Publication date: June 19, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Po-Chin Kuo, Chung-Liang Cheng, Hsien-Ming Lee, Weng Chang
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Publication number: 20130154002Abstract: A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from the semiconductor fin by the gate dielectric layer. The gate electrode includes a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer. The top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function.Type: ApplicationFiled: December 16, 2011Publication date: June 20, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chin Kuo, Hsien-Ming Lee