Abstract: A zoned heat dissipation control system for a water cooling radiator and a water cooling heat dissipation system having the zoned heat dissipation control system includes a plurality of fans, a plurality of heat dissipation zones defined on the water cooling radiator, a thermal detector, and a control unit. At least one of the fans is disposed within each of the heat dissipation zones. The thermal detector is disposed within at least one of the heat dissipation zones and configured to detect the temperature of the water cooling radiator. The control unit is electrically connected to the fans and the thermal detector and configured to modulate the rotational speed of the fan within each of the heat dissipation zones based on the detected data from the thermal detector.

Abstract: A portable thermal therapy apparatus is for executing an operating method capable of recording the thermal therapy procedure. The operating method for a portable thermal therapy apparatus includes receiving an operating command, the operating command at least having an operating parameter, executing an operating procedure according to the operating command, the operating procedure at least including an operating mode, and recording the operating mode into an operating log message.

Abstract: The present invention provides a high efficiency scroll compressor with spiral compressor blades of unequal thickness, using unfolding logarithmic spirals configured to satisfy a gear engaging condition, that is, spirals of unequal thickness serve as compressor blades, thereby providing high gas compression ratio, and high compression efficiency, to achieve the objectives of energy conservation and carbon reduction.

Abstract: The present invention provides a solar tracking skylight system for illumination, primarily including a light guide, a solar tracking controller, a two-axis tracking mechanism, an energy converter and energy storage system, and a weather protective cover. The system uses the solar tracking controller to detect the direction of the light, thereby enabling the two-axis tracking mechanism to move toward the light to facilitate the light guide in collecting light and diffusing it indoors for illumination use. The protective cover provides waterproofing, and the energy converter and energy storage system is used to store electrical energy generated by the solar energy panel for system use. External power is not needed for the system to operate and provide indoor lighting, thereby achieving the objective of saving energy and reducing carbon emissions.

Abstract: The present invention provides a solar tracking skylight system for illumination, primarily including a light guide, a solar tracking controller, a two-axis tracking mechanism, an energy converter and energy storage system, and a weather protective cover. The system uses the solar tracking controller to detect the direction of the light, thereby enabling the two-axis tracking mechanism to move toward the light to facilitate the light guide in collecting light and diffusing it indoors for illumination use. The protective cover provides waterproofing, and the energy converter and energy storage system is used to store electrical energy generated by the solar energy panel for system use. External power is not needed for the system to operate and provide indoor lighting, thereby achieving the objective of saving energy and reducing carbon emissions.

Abstract: An electrohydrodynamic evaporator device (EHD) has an EHD electrode. An electric field is generated upon a fluid of low conductivity inside the evaporator device and an enhanced thermal transport effect is then achieved since a thermal boundary layer near a thermal transport surface is caused to have a greater perturbation while a very small voltage drop. With the EHD utilized, size, weight, cost and required refrigerant amount of the evaporator device are reduced. Further, thermal transport efficiency of the alternative refrigerant is improved, making the EHD evaporator device in compliance with associated refrigerant regulations made by CFC and achieve the purposes of environmental protection and energy saving.

Abstract: An electrohydrodynamic (EHD) condenser device includes a condenser installed with an EHD electrode. An electric field is generated upon a fluid of low conductivity inside a compressor device and an enhanced thermal conduction effect is then achieved since the electric field induces current convection, migration and deformity of bubble, increases perturbation and mixture of the flow field and eliminates boiling and delay. With the EHD utilized, size, weight, cost and required refrigerant amount of the condenser device are reduced. Further, thermal conduction efficiency of the alternative refrigerant is improved, making the EHD compensator device in compliance with associated refrigerant regulations made by CFC and achieve the purposes of environmental protection and energy saving.

Abstract: An electrohydrodynamic (EHD) condenser device includes a condenser installed with an EHD electrode. An electric field is generated upon a fluid of low conductivity inside a compressor device and an enhanced thermal conduction effect is then achieved since the electric field induces current convection, migration and deformity of bubble, increases perturbation and mixture of the flow field and eliminates boiling and delay. With the EHD utilized, size, weight, cost and required refrigerant amount of the condenser device are reduced. Further, thermal conduction efficiency of the alternative refrigerant is improved, making the EHD compensator device in compliance with associated refrigerant regulations made by CFC and achieve the purposes of environmental protection and energy saving.

Abstract: An electrohydrodynamic evaporator device (EHD) has an EHD electrode. An electric field is generated upon a fluid of low conductivity inside the evaporator device and an enhanced thermal transport effect is then achieved since a thermal boundary layer near a thermal transport surface is caused to have a greater perturbation while a very small voltage drop. With the EHD utilized, size, weight, cost and required refrigerant amount of the evaporator device are reduced. Further, thermal transport efficiency of the alternative refrigerant is improved, making the EHD evaporator device in compliance with associated refrigerant regulations made by CFC and achieve the purposes of environmental protection and energy saving.

Abstract: An apparatus for real time 2-D IDCT comprises a rate buffer, a pair of multiplexers, a plurality of registers, a plurality of parameter extractors, a plurality of accumulators, a plurality of summing elements, a pair of truncators, a transpose buffer and an inverse rate buffer. In the present invention, data input rate of the rate buffer and output rate of the inverse rate buffer are a first rate, while the transform process, which is carried out between the rate buffer and the inverse rate buffer, is at a second rate. Moreover, a distributed arithmetic structure is utilized in the invention to decrease the circuit complexity and increase the operating efficiency. Therefore, real time 2-D IDCT can be achieved by the apparatus of the present invention.

Abstract: An apparatus for real time 2-D DCT comprises a rate buffer, a pair of multiplexers, a plurality of registers, a plurality of summing elements, a plurality of parameter extractors, a plurality of accumulators, a pair of truncators, a transpose buffer and an inverse rate buffer. In the present invention, data input rate of the rate buffer and output rate of the inverse rate buffer are a first rate, while the transform process, which is carried out between the rate buffer and the inverse rate buffer, is at a second rate. Moreover, a distributed arithmetic structure is utilized in the invention to decrease the circuit complexity and increase the operating efficiency. Therefore, real time 2-D DCT can be achieved by the apparatus of the present invention.

Abstract: A code table apparatus for a variable length decoder (VLD) is disclosed. The code table apparatus is connected to a barrel shifter to obtain an input code which consists of a code word portion and a sign bit. The code table apparatus comprises a coefficient table for generating a level code and a length code by the code word portion, and a mask circuit for generating a sign bit by a logic operation of the input code and the length code. The coefficient table can decode input codes with opposite sign bits, thus reducing the dimensions of the coefficient table as well as the VLD. Furthermore, since the dimensions of the coefficient table are reduced, the operation time delay of the DCT coefficient table can be shorter, thus improving the performance of the VLD.

Abstract: A 2-D DCT/IDCT circuit comprises a rate buffer, a multiplexer, a one-dimensional DCT/IDCT processor, a transpose buffer and an inverse rate buffer. The data input rate of the rate buffer and the output rate of the inverse rate buffer are a first rate, while the transform process, which is carried out between the rate buffer and the inverse rate buffer by the 1-D DCT/IDCT processor, is at a second rate. Since the second rate is approximately two times the first rate, the 2-D DCT/IDCT circuit can satisfy the requirement of high speed operation. Moreover, since the 2-D DCT/IDCT circuit according the present invention provides a specific arrangement of the order of input/output data, the hardware structure is simplified, thereby making it easy to realize in a VLSI circuit.

Abstract: A transpose memory is disclosed which has four dual port memories, a first counter for writing elements in the dual port memories and a second counter for reading out elements from the dual port memories. If the received matrix is to be outputted to the first type of transform circuit, the first counter writes each matrix element in a particular dual port memory assigned to the quadrant of the matrix element. If the received matrix is to be outputted to the second type of transform circuit, the first counter writes each matrix element in a particular dual port memory assigned to the "evenness" or "oddness" (i.e., divisibleness by two) of the row and column of the matrix element.

Abstract: A multiple-delay variable delay circuit uses a random access memory (RAM) array to provide adjustable delay of a block of input data, such as previously necessitated use of an extensive shift register configuration. A single RAM array, having a given capacity, is used to economically provide individual delays to a plurality of blocks of input data, with the aggregate of the individual delays not exceeding the capacity of the single RAM array. Time-shared use of a high speed RAM enables simultaneous single-port processing of data blocks, with delay control circuits providing utilization of separate portions of the RAM capacity, to provide individual delays resulting from successive read/write cycles utilizing a desired total of incremental delays. Simplified delay control circuits provide manufacturing and operating economies with single-port or multi-port RAM arrays.

Abstract: A pipeline multiplier is used for multiplying a multiplicand to a multiplier. The pipeline multiplier includes a plurality of adder stages each adder stage includes a partial product processor for processing a partial product of the multiplicand and one of the multiplier. Each of the adder stages further includes a plurality of ripple carry adder (RCA) bands each band includes a plurality of full adders wherein the carry of the full adders ripple sequentially to the most significant full adder in the RCA band. Furthermore, each of the RCA bands in each adder stage includes approximately same number of full adders. The adder stages are further arranged in sequential order such that each of the RCA bands in each stage are pipelined to a corresponding RCA band, which is a RCA band being more-significantly-shifted by one bit, in next adder stage according to the sequential order whereby an accumulative partial product is propagated from one of the adder stages to a next stage.

Abstract: A cascadable multi-pulse generator stage for generating a one-shot pulse signal and a delayed trigger signal is disclosed. The cascadable multi-pulse generator stage includes a first pulse signal generator for generating a first one-shot pulse signal in response to an external trigger signal inputted to the cascadable multi-pulse generator stage. The cascadable multi-pulse generator stage also includes a second pulse signal generator, responsive to the first pulse signal generator, for generating a second one-shot pulse signal delayed from the first one-shot pulse signal by a fixed internal delay. Lastly, the stage includes a trigger signal generator, responsive to the first and second pulse signal generators, for generating a trigger pulse, having a period approximately equal to the sum of the periods of the first and second pulse signals. The one-shot pulse and trigger pulse signals serve for generating the one-shot and trigger outputs of the stage.