Patents by Inventor Po-Chuan Wang
Po-Chuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240113142Abstract: An image sensor includes a group of sensor units, a color filter layer disposed within the group of sensor units, and a dielectric structure and a metasurface disposed corresponding to the color filter layer. The metasurface includes a plurality of peripheral nanoposts located at corners of the group of sensor units from top view, respectively, a central nanopost enclosed by the plurality of peripheral nanoposts, and a filling material laterally surrounding the plurality of peripheral nanoposts and the central nanopost. The central nanopost is offset from a center point of the group of sensor units by a distance from top view.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Po-Han FU, Wei-Ko WANG, Shih-Liang KU, Chin-Chuan HSIEH
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Patent number: 11947879Abstract: An interactive information system includes: a first frame, a first interactive module arranged in the first frame, a second frame, a control module arranged in the second frame and configured to generate a graphic user interface (GUI) and to perform a function of the interactive information system based on the first user input; and a first internal cable connecting the first interactive module bridge board and the control module and configured to transmit the plurality of inter-frame signals between the first frame and the second frame. The first interactive module includes: a first display module for display of the GUI; a first touch input module configured to receive a first user input to the GUI; and a first interactive module bridge board configured to transmit a plurality of inter-frame signals comprising electrical signals of the first display module and the first touch input module.Type: GrantFiled: May 24, 2022Date of Patent: April 2, 2024Assignee: Flytech Technology Co., Ltd.Inventors: Tai-Seng Lam, Po-Hung Lin, Hsuan-Chuan Wang, Yong-Shun Kuan
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Patent number: 11923433Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.Type: GrantFiled: March 9, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
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Patent number: 11855153Abstract: A semiconductor device and method of manufacture are provided which utilize a remote plasma process which reduces or eliminates segregation of material. By reducing segregation of the material, overlying conductive material can be deposited on a smoother interface. By depositing on smoother interfaces, overall losses of the deposited material may be avoided, which improves the overall yield.Type: GrantFiled: April 30, 2021Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Chuan Wang, Chia-Yang Hung, Sheng-Liang Pan
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Publication number: 20230387222Abstract: A semiconductor device and method of manufacture are provided which utilize a remote plasma process which reduces or eliminates segregation of material. By reducing segregation of the material, overlying conductive material can be deposited on a smoother interface. By depositing on smoother interfaces, overall losses of the deposited material may be avoided, which improves the overall yield.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Inventors: Po-Chuan Wang, Chia-Yang Hung, Sheng-Liang Pan
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Publication number: 20230386821Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.Type: ApplicationFiled: July 26, 2023Publication date: November 30, 2023Inventors: Po-Chuan Wang, Guan-Xuan Chen, Chia-Yang Hung, Sheng-Liang Pan, Huan-Just Lin
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Publication number: 20230268223Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a gate electrode, a gate electrode contact layer over the gate electrode, forming a dielectric layer over the gate electrode contact layer, and performing an etch through the dielectric layer, the etch forming an opening that exposes the gate electrode contact layer. The method further includes performing a post-etch treatment on the opening formed by the etch process by exposing the opening to a plasma. The method further includes forming gate electrode contacts in the openings after the post-etch treatment by a bottom-up deposition process.Type: ApplicationFiled: February 24, 2022Publication date: August 24, 2023Inventors: Po-Chuan Wang, Guan-Xuan Chen, Chia-Yang Hung, Sheng-Liang Pan, Huan-Just Lin
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Publication number: 20230178361Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a first opening through a dielectric layer, the opening exposing a conductive region. A wet cleaning is used after the forming the first opening, and the first opening is treated after the wet cleaning the first opening, the treating the first opening comprising turning a sidewall treatment precursor and a bottom treatment precursor into a first plasma mixture, the sidewall treatment precursor being different from the bottom treatment precursor. The first opening is filled with a conductive material after the treating the first opening.Type: ApplicationFiled: April 13, 2022Publication date: June 8, 2023Inventors: Chia-Yang Hung, Huan-Just Lin, Sheng-Liang Pan, Yungtzu Chen, Po-Chuan Wang, Guan-Xuan Chen
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Publication number: 20230014509Abstract: A method for making a semiconductor device includes patterning at least one dielectric layer disposed over a conductive cap layer to form a via opening penetrating through the at least one dielectric layer to expose the conductive cap layer and to form a top portion of the conductive cap layer into a metal oxide layer; converting the metal oxide layer to a metal oxynitride layer by a soft ashing process using a processing gas containing nitrogen gas; removing the metal oxynitride layer from a remaining portion of the conductive cap layer; and forming a via contact in the via opening to electrically connect the remaining portion of the conductive cap layer.Type: ApplicationFiled: July 16, 2021Publication date: January 19, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guan-Xuan CHEN, Sheng-Liang PAN, Chia-Yang HUNG, Po-Chuan WANG, Huan-Just LIN
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Publication number: 20220320311Abstract: A method includes forming a gate structure on a semiconductor substrate; depositing a carbon-containing seal layer over the gate structure; depositing a nitrogen-containing seal layer over the carbon-containing seal layer; introducing an oxygen-containing precursor on the nitrogen-containing seal layer; heating the substrate to dissociate the oxygen-containing precursor into an oxygen radical to dope into the nitrogen-containing seal layer; after heating the substrate, etching the nitrogen-containing seal layer and the carbon-containing seal layer, such that a remainder of the nitrogen-containing seal layer and the carbon-containing seal layer remains on a sidewall of the gate structure as a gate spacer.Type: ApplicationFiled: June 25, 2021Publication date: October 6, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Sheng-Liang PAN, Yung-Tzu CHEN, Chung-Chieh LEE, Yung-Chang HSU, Chia-Yang HUNG, Po-Chuan WANG, Guan-Xuan CHEN, Huan-Just LIN
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Publication number: 20220293741Abstract: A semiconductor device and method of manufacture are provided which utilize a remote plasma process which reduces or eliminates segregation of material. By reducing segregation of the material, overlying conductive material can be deposited on a smoother interface. By depositing on smoother interfaces, overall losses of the deposited material may be avoided, which improves the overall yield.Type: ApplicationFiled: April 30, 2021Publication date: September 15, 2022Inventors: Po-Chuan Wang, Chia-Yang Hung, Sheng-Liang Pan
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Publication number: 20220156929Abstract: A medical image analyzing system and a medical image analyzing method are provided and include inputting at least one patient image into a first model of a neural network module to obtain a result having determined positions and ranges of an organ and a tumor of the patient image; inputting the result into a second model of a first analysis module and a third model of a second analysis module, respectively, to obtain at least one first prediction value and at least one second prediction value corresponding to the patient image; and outputting a determined result based on the first prediction value and the second prediction value. Further, processes between the first model, the second model and the third model can be automated, thereby improving identification rate of pancreatic cancer.Type: ApplicationFiled: October 22, 2021Publication date: May 19, 2022Inventors: Wei-Chung Wang, Wei-Chih Liao, Kao-Lang Liu, Po-Ting Chen, Po-Chuan Wang, Da-Wei Chang
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Publication number: 20220130038Abstract: A medical image analyzing system and a medical image analyzing method are provided and include inputting at least one patient image into a first model of a first neural network module to obtain a result having determined positions and ranges of an organ and a tumor of the patient image; inputting the result into a plurality of second models of a second neural network module, respectively, to obtain a plurality of prediction values corresponding to each of the plurality of second models and a model number predicting having cancer in the plurality of prediction values; and outputting a determined result based on the model number predicting having cancer and a number threshold value. Further, processes between the first model and the second models can be automated, thereby improving identification rate of pancreatic cancer.Type: ApplicationFiled: October 22, 2021Publication date: April 28, 2022Inventors: Wei-Chung Wang, Wei-Chih Liao, Kao-Lang Liu, Po-Ting Chen, Po-Chuan Wang, Ting-Hui Wu
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Publication number: 20220102138Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.Type: ApplicationFiled: April 16, 2021Publication date: March 31, 2022Inventors: Po-Chuan Wang, Guan-Xuan Chen, Chia-Yang Hung, Sheng-Liang Pan, Huan-Just Lin
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Publication number: 20210359104Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.Type: ApplicationFiled: March 9, 2021Publication date: November 18, 2021Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin