Patents by Inventor Po-Chun Huang

Po-Chun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240140782
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
  • Patent number: 11972957
    Abstract: A gas flow accelerator may include a body portion, and a tapered body portion including a first end integrally formed with the body portion. The gas flow accelerator may include an inlet port connected to the body portion and to receive a process gas to be removed from a semiconductor processing tool by a main pumping line. The semiconductor processing tool may include a chuck and a chuck vacuum line to apply a vacuum to the chuck to retain a semiconductor device. The tapered body portion may be configured to generate a rotational flow of the process gas to prevent buildup of processing byproduct on interior walls of the main pumping line. The gas flow accelerator may include an outlet port integrally formed with a second end of the tapered body portion. An end portion of the chuck vacuum line may be provided through the outlet port.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-chun Yang, Chih-Lung Cheng, Yi-Ming Lin, Po-Chih Huang, Yu-Hsiang Juan, Xuan-Yang Zheng
  • Publication number: 20240136401
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.
    Type: Application
    Filed: January 5, 2024
    Publication date: April 25, 2024
    Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
  • Publication number: 20240115616
    Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Patent number: 11955154
    Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
  • Patent number: 11942130
    Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
  • Publication number: 20240092544
    Abstract: Disclosed in the present invention is a flip top lid with a replaceable threaded decorative top, comprising a flip top lid and a replaceable threaded decorative top. The flip top lid consists of a base unit and a flip top unit mounted or connected to the base unit at one side by a hinge structure. The replaceable threaded decorative top is connected and matched with the flip top unit through a threaded joint structure. The flip top unit is configured with a first threaded joint structure and the replaceable threaded decorative top is configured with a matching second threaded joint structure, so that the replaceable threaded decorative top can be tightly screwed on to the flip top unit and also quickly detached from the flip top unit. Through the flip top lid with a replaceable threaded decorative top, consumers will have the freedom to choose various appearance designs for their flip top bottles whenever they want, so as to enhance the aesthetic effect and to express their personal styles.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 21, 2024
    Inventor: Po-Chun Huang
  • Publication number: 20240088307
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240086612
    Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Po-Hsiang HUANG, Fong-Yuan CHANG, Clement Hsingjen WANN, Chih-Hsin KO, Sheng-Hsiung CHEN, Li-Chun TIEN, Chia-Ming HSU
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240080675
    Abstract: A method for performing network control in a wireless communications system and associated apparatus are provided. The method may include: carrying a set of link information in a preamble of a first data transmission frame transmitted from the first network device to a second network device, wherein the set of link information may include at least one indication among the following indications: a destination device indication, a device assignment indication and a transmission power control indication; wherein a third network device is arranged to monitor wireless transmission in the wireless communications system to obtain the set of link information from the first data transmission frame, and determine spatial reuse (SR) transmission availability of the third network device based on the set of link information.
    Type: Application
    Filed: August 4, 2023
    Publication date: March 7, 2024
    Applicant: MEDIATEK INC.
    Inventors: Hsin-Chun Huang, Po-Chun Fang, Tsung-Jung Lee, Ray-Kuo Lin
  • Patent number: 11923394
    Abstract: In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Han Huang, Jiech-Fun Lu, Yu-Chun Chen
  • Patent number: 11917923
    Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ching-Hua Hsu, Si-Han Tsai, Shun-Yu Huang, Chen-Yi Weng, Ju-Chun Fan, Che-Wei Chang, Yi-Yu Lin, Po-Kai Hsu, Jing-Yin Jhang, Ya-Jyuan Hung
  • Publication number: 20230177972
    Abstract: A proficiency detection method includes providing a question to a user, setting a scoring standard, detecting a handwriting response status of the user to the question, generating a proficiency score according to the handwriting response status and the scoring standard, and determining a proficiency of the user according to the proficiency score.
    Type: Application
    Filed: March 9, 2022
    Publication date: June 8, 2023
    Applicant: BENQ CORPORATION
    Inventor: Po-Chun Huang
  • Patent number: 11601156
    Abstract: Disclosed herein are devices and methods to reduce unwanted CIM3 emission in a wireless communication device, such that the transmit (TX) power level applied in a RU can be increased without exceeding a regulatory emission requirement. In some aspects, unwanted emission may be reduced by shifting or changing local oscillator (LO) frequencies during TX operation. Some embodiments are directed to a fast-locking PLL with adjustable bandwidth that can be controlled to increase the PLL bandwidth during the RX to TX transition to provide a fast locking to a new LO frequency. Some aspects are directed to configuring an LO frequency shift amount for different RUs when multiple RUs are allocated within a frequency band.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: March 7, 2023
    Assignee: MediaTek Inc.
    Inventors: Yu-Hsien Chang, Po-Chun Huang, Pi-An Wu, Wen-Hsien Chiu, Tzu-Wen Sung
  • Publication number: 20220374188
    Abstract: An electronic billboard and a controlling method thereof are disclosed, wherein the electronic billboard includes plural displaying areas, a user interaction tracker and a data flow manager. Each one of the display areas correspondingly form a telecommunication connection with one of plural video delivery devices, and respectively displays the image data provided by the video delivery devices. The user interaction tracker is used to calculate the interaction indexes between at least one user and each one of the display area. The data flow manager regulates the flows of the image data respectively delivered to the display areas according to the interactive indexes.
    Type: Application
    Filed: April 22, 2022
    Publication date: November 24, 2022
    Applicant: BENQ CORPORATION
    Inventor: Po-Chun HUANG
  • Patent number: 11509315
    Abstract: A fractional-N phase locked loop (PLL) and a sliced charge pump (CP) control method thereof are provided. The fractional-N PLL includes a first current source, a first phase frequency detector (PFD), a second current source, a second PFD, and a divided clock controller. The first current source provides a first current. The first PFD generates a first detection signal according to a first divided clock, for controlling the first current source, wherein the first divided clock is generated according to an oscillation clock having an oscillation period. The second current source provides a second current. The second PFD generates a second detection signal according to a second divided clock, for controlling the second current source. The divided clock controller controls the second divided clock based on a variable delay relative to the first divided clock, wherein the variable delay is an integer times the oscillation period.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: November 22, 2022
    Assignee: MEDIATEK INC.
    Inventors: Po-Chun Huang, Yu-Li Hsueh
  • Publication number: 20220267062
    Abstract: A replaceable container topper is disclosed. It is mainly combined with the cover of any container (clamshell cover or separate cover). The cover is configured with a first joint structure, and the topper is configured with a matching second joint structure at a corresponding position, so that the topper and the cover can be combined firmly and stably, and can also be separated easily and quickly; the topper can have various structural and functional designs with no limit to its shape and structure, including working as: any of a fixed or movable handle, a soft long suspender or short band, a decorator of any style, a small electronic device or mechanical device. Through various designs of the topper, the container as a whole can have unique and personalized styles to not only enhance the aesthetics but also provide additional practical functions, such as telling the time, playing music, emitting light, positioning and tracking, or even to provide value for collection.
    Type: Application
    Filed: February 22, 2021
    Publication date: August 25, 2022
    Inventor: Po-Chun Huang
  • Publication number: 20220242614
    Abstract: The present invention provides a replaceable container protective cover. The protective cover has a main body and a joint structure configured on the opposite sides of the main body for quick assembly and disassembly. The surface of the protective cover can maintain the original plain form of the material, or can be printed with graphic patterns, or can be configured with a plurality of embedding holes arranged in any form, or can even adopt a hybrid design with combination of graphic patterns and embedding holes. The embedding holes can be in any style, matched by a button body for decoration. Moreover, the button body can be an independent embedding unit, a graphic body combined with an embedding unit, or a graphic body combined with the combination of a plurality of embedding units.
    Type: Application
    Filed: February 2, 2021
    Publication date: August 4, 2022
    Inventor: Po-Chun Huang
  • Patent number: 11387813
    Abstract: A frequency multiplier and a delay-reused duty cycle calibration method thereof are provided. The frequency multiplier includes a first calibration circuit, a second calibration circuit and a controller. In a calibration mode of the frequency multiplier, an output terminal of a delay cell is coupled to an input terminal of the delay cell. The first calibration circuit repeatedly uses the delay cell M times for generating a first delayed signal. The controller controls the delay cell according to the first delayed signal, to find a delay of the delay cell which makes M times the delay be equal to one cycle period of an input clock signal. After the delay is found, the delay cell is repeatedly used M/2 times for generating a second delayed signal. The controller controls the second calibration circuit according to the second delayed signal to make an input calibration signal have a target duty cycle.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: July 12, 2022
    Assignee: MEDIATEK INC.
    Inventors: Hsiu-Hsien Ting, Po-Chun Huang, Yu-Li Hsueh