Abstract: A light sensing pixel including a first transistor, a compensation circuit, an output circuit, a capacitor and a light sensing circuit is provided. The control terminal of the first transistor is coupled with a first node. The first terminal of the first transistor is configured to receive a first operation voltage or a second operation voltage lower than the first operation voltage. The compensation circuit is configured to detect a threshold voltage of the first transistor, and is configured to form a diode-connected structure with the first transistor. The output circuit is coupled between the second terminal of the first transistor and a sensing line. The capacitor is coupled between the first node and the light sensing circuit. In response to the light sensing circuit is illuminated by light, the first terminal of the capacitor and the second terminal of the capacitor generate voltage variations simultaneously.

Abstract: A pixel circuit including a compensation circuit, a writing circuit, a light emitting element, and a power supplying circuit is provided. The compensation circuit comprises a first node, and provides a driving current to the light emitting element according to a voltage of the first node and a system high voltage. The writing circuit provides a data voltage to the compensation circuit according to a first control signal so that the compensation circuit sets the voltage of the first node. The power supplying circuit selectively couples the compensation circuit to the light emitting element, and provides the system high voltage and a system low voltage to the compensation circuit, in which the system low voltage is configured to reset the voltage of the first node. The first control signal and the second control signal are opposite to the first emission signal and the second emission signal, respectively.

Abstract: A high voltage semiconductor device includes a semiconductor substrate, a gate structure, a drift region, a drain region, and an isolation structure. The gate structure is disposed on the semiconductor substrate. The drift region is disposed in the semiconductor substrate and partially disposed at a side of the gate structure. The drain region is disposed in the drift region. The isolation structure is at least partially disposed in the drift region. A part of the isolation structure is disposed between the drain region and the gate structure. The isolation structure includes a curved bottom surface.

Abstract: The present disclosure relates to a pixel circuit including a light emitting element, a driving circuit, a first data storage circuit and a second data storage circuit. The driving circuit is electrically coupled to the light emitting element. The first data storage circuit is electrically coupled to the driving circuit, and is configured to transmit a first data signal to the driving circuit during a first frame period, so that the driving circuit drives the light emitting element according to the first data signal. The second data storage circuit is electrically coupled to the driving circuit, and is configured to receive a second data signal during the first frame period.

Abstract: A high voltage semiconductor device includes a semiconductor substrate, a gate structure, a drift region, a drain region, and an isolation structure. The gate structure is disposed on the semiconductor substrate. The drift region is disposed in the semiconductor substrate and partially disposed at a side of the gate structure. The drain region is disposed in the drift region. The isolation structure is at least partially disposed in the drift region. A part of the isolation structure is disposed between the drain region and the gate structure. A top of the isolation structure includes a flat surface, and a bottom of the isolation structure includes a curved surface.

Abstract: A high voltage semiconductor device includes a semiconductor substrate, a gate structure, a drift region, a drain region, and an isolation structure. The gate structure is disposed on the semiconductor substrate. The drift region is disposed in the semiconductor substrate and partially disposed at a side of the gate structure. The drain region is disposed in the drift region. The isolation structure is at least partially disposed in the drift region. A part of the isolation structure is disposed between the drain region and the gate structure. A top of the isolation structure includes a flat surface, and a bottom of the isolation structure includes a curved surface.

Abstract: A pixel circuit including a compensation circuit, a writing circuit, a light emitting element, and a power supplying circuit is provided. The compensation circuit comprises a first node, and provides a driving current to the light emitting element according to a voltage of the first node and a system high voltage. The writing circuit provides a data voltage to the compensation circuit according to a first control signal so that the compensation circuit sets the voltage of the first node. The power supplying circuit selectively couples the compensation circuit to the light emitting element, and provides the system high voltage and a system low voltage to the compensation circuit, in which the system low voltage is configured to reset the voltage of the first node. The first control signal and the second control signal are opposite to the first emission signal and the second emission signal, respectively.

Abstract: A pixel circuit includes a driving circuit, a lighting element, and multiple switching circuits. The driving circuit is configured to provide a driving current to a first node. A first terminal of the lighting element is coupled with a second node. A second terminal of the lighting element is configured to receive a system low voltage. The multiple switching circuits are coupled between the first node and the second node in a parallel connection, and configured to correspondingly receive multiple emission control signals and at least one grayscale control signal. During each frame, the multiple emission control signals provide multiple pulses, and the multiple pulses do not mutually overlapping in time sequence, so that the multiple switching circuits selectively couple the first node to the second node according to the multiple pulses and the at least one grayscale control signal.

Abstract: A pixel circuit includes a driving circuit, a lighting element, and multiple switching circuits. The driving circuit is configured to provide a driving current to a first node. A first terminal of the lighting element is coupled with a second node. A second terminal of the lighting element is configured to receive a system low voltage. The multiple switching circuits are coupled between the first node and the second node in a parallel connection, and configured to correspondingly receive multiple emission control signals and at least one grayscale control signal. During each frame, the multiple emission control signals provide multiple pulses, and the multiple pulses do not mutually overlapping in time sequence, so that the multiple switching circuits selectively couple the first node to the second node according to the multiple pulses and the at least one grayscale control signal.

Abstract: A shift register circuit includes a driving unit outputting a first scan signal according to a first clock signal; a pull up unit outputting a driving voltage according to one of a second scan signal and a third scan signal; a pull down unit pulling down voltage of an output end according to a second clock signal; a pull down control unit controlling the voltage of the output end and a driving node according to the first clock signal; a reset unit pulling down the voltage level of the driving node according to a touch-enable signal; and an electric storage unit adjusting the voltage of the driving node according to a touch-stop signal. When the touch-enable signal is enabled, the clock signals and the touch-stop signal are disabled, and when the touch-stop signal is enabled, the clock signals and the touch-enable signal are disabled.

Abstract: A shift register circuit includes a driving unit outputting a first scan signal according to a first clock signal; a pull up unit outputting a driving voltage according to one of a second scan signal and a third scan signal; a pull down unit pulling down voltage of an output end according to a second clock signal; a pull down control unit controlling the voltage of the output end and a driving node according to the first clock signal; a reset unit pulling down the voltage level of the driving node according to a touch-enable signal; and an electric storage unit adjusting the voltage of the driving node according to a touch-stop signal. When the touch-enable signal is enabled, the clock signals and the touch-stop signal are disabled, and when the touch-stop signal is enabled, the clock signals and the touch-enable signal are disabled.

Abstract: A data management method for a network. Whether a first record in a database is updated is automatically determined. Content of the first record is organized in a hierarchical structure. Which of a group of clients is affected by update of the first record is automatically determined. A data format corresponding to an affected client is automatically determined. A message is automatically generated by modifying the hierarchical structure according to the data format. The message comprising the result of modifying the hierarchical structure is automatically transmitted to the affected client.

Abstract: A data management method for a network. Whether a first record in a database is updated is automatically determined. Content of the first record is organized in a hierarchical structure. Which of a group of clients is affected by update of the first record is automatically determined. A data format corresponding to an affected client is automatically determined. A message is automatically generated by modifying the hierarchical structure according to the data format. The message comprising the result of modifying the hierarchical structure is automatically transmitted to the affected client.

Abstract: Systems and methods for MES (manufacturing execution system) integration. A Web server receives lot control data for a lot control operation performed in a MES server and selectively transmits the lot control data. A message encoder receives the lot control data from the Web server and encodes the lot control data in a lot control message for the MES server. A message controller receives the lot control message and directs the MES server to perform the lot control operation according to the lot control message.

Abstract: A systematic approach for generating a work release plan that considers both demand and supply variables. The approach comprises prioritizing scheduled lots in order of their critical ratios, estimating an initial daily release quota for the scheduled lots based on both pull and push requirements, and determining detailed capacity constraints for the manufacturing system. The approach further comprises testing whether the initial daily release quota complies with the detailed capacity constraints, and, if the detailed capacity constraints are violated, rearranging the lots in the initial daily release quota so that the detailed capacity constraints are met.

Abstract: A systematic approach for generating a work release plan that considers both demand and supply variables. The approach comprises prioritizing scheduled lots in order of their critical ratios, estimating an initial daily release quota for the scheduled lots based on both pull and push requirements, and determining detailed capacity constraints for the manufacturing system. The approach further comprises testing whether the initial daily release quota complies with the detailed capacity constraints, and, if the detailed capacity constraints are violated, rearranging the lots in the initial daily release quota so that the detailed capacity constraints are met.