Patents by Inventor Po-Han CHENG
Po-Han CHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230378304Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming a semiconductor stack on a substrate, wherein the semiconductor stack includes a first semiconductor layers and a second semiconductor layers alternatively disposed, the first semiconductor layers and the second semiconductor layers being different in composition; patterning the semiconductor stack to form a semiconductor fin; forming a dielectric fin next to the semiconductor fin; forming a first gate stack on the semiconductor fin and the dielectric fin; etching to a portion of the semiconductor fin within a source/drain region, resulting in a source/drain recess; and epitaxially growing a source/drain feature in the source/drain recess, defining an airgap spanning between a sidewall of the source/drain feature and a sidewall of the dielectric fin.Type: ApplicationFiled: August 2, 2023Publication date: November 23, 2023Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Yee-Chia Yeo, Wei Hao Lu
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Publication number: 20230369362Abstract: A chip package includes a carrier board, a chip, a light transmissive sheet, a supporting element, and a molding material. The chip is located on the carrier board and has a sensing area. The light transmissive sheet is located above the supporting element and covers the sensing area of the chip. The supporting element is located between the light transmissive sheet and the chip, and surrounds the sensing area of the chip. The molding material is located on the carrier board and surrounds the chip and the light transmissive sheet. A top surface of the molding material is lower than a top surface of the light transmissive sheet.Type: ApplicationFiled: May 4, 2023Publication date: November 16, 2023Inventors: Po-Han LEE, Tsang Yu LIU, Chia-Ming CHENG, Kuei Wei CHEN, Jiun-Yen LAI
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Publication number: 20230266813Abstract: An electronic device and a performance optimization method thereof are provided. The electronic device includes a battery module, a processor, and a controller. The battery module is configured to supply power to the electronic device. The processor has a power limit. The controller is configured to monitor a charging and discharging current of the battery module. In a power connection mode, the controller analyzes a status of the battery module and adjusts the power limit of the processor according to the charging and discharging current.Type: ApplicationFiled: October 14, 2022Publication date: August 24, 2023Applicant: ASUSTeK COMPUTER INC.Inventors: Po-Han Cheng, Chin-Chang Chang, Po-Hsin Chang, Shih-Hao Chen, Kai-Peng Chung, Ci-Syuan Wu, Chun Tsao, Teng-Chih Wang, Sheng-Yi Chen, Guan-Heng Lai
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Publication number: 20230251303Abstract: A wafer inspection system includes probe and supporting devices opposite to each other. The probe device includes a probe and an electrically conductive module for transmitting test signal of a driver IC. The supporting device includes a chuck, an annular elastic module detachably disposed on the chuck, and a carrier. The chuck has a supporting portion located correspondingly to a hollow portion of the annular elastic module, which is larger than or equal to the carrier in size on an imaginary horizontal plane, enabling the carrier carrying a wafer to be placed on the supporting portion to be electrically connected with the annular elastic module. When the wafer is contacted by the probe, the electrically conductive module is abutted against the annular elastic module to form a short-path test loop. As a result, it is convenient to pick and place the carrier and wafer, enhancing inspection efficiency.Type: ApplicationFiled: February 2, 2023Publication date: August 10, 2023Applicant: MPI CORPORATIONInventors: YI-HSUAN CHENG, HUNG-I LIN, PO-HAN PENG
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Publication number: 20230197421Abstract: A method includes loading a wafer over a wafer chuck in a process chamber; performing a deposition process on the loaded wafer; supplying a fluid medium to a fluid guiding structure in the wafer chuck from a fluid inlet port on the wafer chuck, the fluid guiding structure comprising a plurality of arc-shaped channels fluidly communicated with each other; guiding the fluid medium from a first one of the arc-shaped channels of the fluid guiding structure to a second one of the arc-shaped channels of the fluid guiding structure. The second one of the arc-shaped channels of the fluid guiding structure is concentric with the first one of the arc-shaped channels of the fluid guiding structure from a top view.Type: ApplicationFiled: February 22, 2023Publication date: June 22, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Sheng-Chun YANG, Yi-Ming LIN, Po-Wei LIANG, Chu-Han HSIEH, Chih-Lung CHENG, Po-Chih HUANG
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Publication number: 20230172472Abstract: A biological energy signal acquisition and conversion device comprises: a signal acquisition module, enhancing a biological energy signal generated by an original biological energy body, and extracting the signal; a signal processing module, receiving the extracted original biological energy signal and filtering and amplifying the signal, and generating an output energy signal; and a signal output unit, being able to enhance an output function in cooperation with a magnetic substance, and output the energy signal to a biological energy carrier. By shortening the distance between the original biological energy body and a signal receiving unit, and using the magnetic substance to excite the original biological energy body, the strength of the received extracted original biological energy signal is enhanced, and the noise proportion is greatly reduced, reducing the technical complexity and costs for back-end signal processing, and improving the effect of a biological energy signal.Type: ApplicationFiled: August 28, 2019Publication date: June 8, 2023Inventors: Chun-Fang Cheng, Ting-Han Hong, Po-Yuan Kung, Jia-De Ni, Hsun-Tsan Shen, Wen-Chun Yeh
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Patent number: 11656271Abstract: A wafer inspection system includes a supporting device having electrically connected supporting and contact portions for supporting a wafer's back, and a probe device having a probe and elastic contact members. When a probe tip of the probe contacts the wafer's front, a contact tip of the elastic contact member is abutted against a contact surface of the contact portion. The contact tip is higher than the probe tip. The contact surface is higher than the wafer's front. Alternatively, the contact surface having a radius larger than or equal to twice the wafer's radius. The horizontal distance between the probe tip and the contact tip is larger than or equal to twice the wafer's radius. This satisfies the test requirement of short-pulse test signal and prevents the structural design and transmitting stability of the elastic contact members from being affected by the inspection temperature.Type: GrantFiled: March 21, 2022Date of Patent: May 23, 2023Assignee: MPI CORPORATIONInventors: Yi-Hsuan Cheng, Hung-I Lin, Po-Han Peng
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Patent number: 10305027Abstract: According to one embodiment, a magnetoresistive element includes a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer. The first nonmagnetic layer is provided between the first magnetic layer and the second magnetic layer. The first nonmagnetic layer includes an oxide including an inverse-spinel structure.Type: GrantFiled: September 8, 2017Date of Patent: May 28, 2019Assignees: Kabushiki Kaisha Toshiba, NATIONAL INSTITUTE FOR MATERIALS SCIENCEInventors: Yushi Kato, Tadaomi Daibou, Yuuzo Kamiguchi, Naoharu Shimomura, Junichi Ito, Hiroaki Sukegawa, Mohamed Belmoubarik, Po-Han Cheng, Seiji Mitani, Tadakatsu Ohkubo, Kazuhiro Hono
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Publication number: 20180090671Abstract: According to one embodiment, a magnetoresistive element includes a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer. The first nonmagnetic layer is provided between the first magnetic layer and the second magnetic layer. The first nonmagnetic layer includes an oxide including an inverse-spinel structure.Type: ApplicationFiled: September 8, 2017Publication date: March 29, 2018Applicants: Kabushiki Kaisha Toshiba, NATIONAL INSTITUTE FOR MATERIALS SCIENCEInventors: Yushi KATO, Tadaomi DAIBOU, Yuuzo KAMIGUCHI, Naoharu SHIMOMURA, Junichi ITO, Hiroaki SUKEGAWA, Mohamed BELMOUBARIK, Po-Han CHENG, Seiji MITANI, Tadakatsu OHKUBO, Kazuhiro HONO