Patents by Inventor Po-Han Lin
Po-Han Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240152880Abstract: A multi-channel payment method for a multi-channel payment system comprises the payer or the payee who initiated the payment request logs in to the multi-channel payment system; the payer or the payee who initiated the payment request placing an order in the multi-channel payment system, wherein the order comprises a designated payment gateway; the multi-channel payment system determining a predicted fee of the order according to the designated payment gateway, past order records, and a real-time exchange rate; the multi-channel payment system performing an anti-money laundering verification of the order; the payer reviewing the order and the predicted fee through a multiple auditing method; and the multi-channel payment system executing payment from the payer to the payee according to the order and the designated payment gateway, and storing a payment detail of the order.Type: ApplicationFiled: February 13, 2023Publication date: May 9, 2024Applicant: OBOOK INC.Inventors: Chun-Kai Wang, Chung-Han Hsieh, Chun-Jen Chen, Po-Hua Lin, Wei-Te Lin, Pei-Hsuan Weng, Mei-Su Wang, I-Cheng Lin, Cheng-Wei Chen
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Publication number: 20240154642Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shih-Wen LU, Chun-Jen CHEN, Po-Hsiang TSENG, Hsin-Han LIN, Ming-Lun YU
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Publication number: 20240130055Abstract: This disclosure relates to a combined power module that includes a base structure, a terminal structure, a second terminal, and a cover. The terminal structure includes a mount assembly and a plurality of first terminals. The mount assembly is assembled on the base structure. The first terminals are disposed on the mount assembly. The second terminal is disposed on the base structure. The cover is disposed on the base structure and covers at least part of the first terminals and at least part of the second terminal.Type: ApplicationFiled: March 2, 2023Publication date: April 18, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yuan-Cheng HUANG, I-Hung CHIANG, Ji-Yuan SYU, Hsin-Han LIN, Po-Kai CHIU, Kuo-Shu KAO
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Publication number: 20240115616Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.Type: ApplicationFiled: October 4, 2023Publication date: April 11, 2024Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
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Patent number: 11948820Abstract: The present invention provides a latching guide structure arranged inside a door of semiconductor carrier. The latching guide structure comprises an upper latching part, a lower latching part, at least one elastic unit and a driver. Moreover, a first guiding portion of the upper latching part is matched with a second guiding portion of the lower latching part, therefore to define the installation space for the at least one elastic unit. On the other hand, the driver simultaneously actuates an upper actuating unit of the first guiding portion and a lower actuating unit of the second guiding portion to linearly move in reverse direction therebetween. The range of the linear motion of the upper actuating unit and the lower actuating unit represents the compression or extension of the at least one elastic unit, determining to control the open/close status of the upper latching part and the lower latching part.Type: GrantFiled: November 28, 2022Date of Patent: April 2, 2024Assignee: GUDENG PRECISION INDUSTRIAL CO., LTD.Inventors: Ming-Chien Chiu, Chih-Ming Lin, Cheng-Han Chou, Po-Ting Lee
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Publication number: 20240105849Abstract: A method for forming a semiconductor structure is provided. The method for forming the semiconductor structure includes forming a fin structure over a substrate in a first direction, forming a first gate stack, a second gate stack and a third gate stack across the fin structure, removing the first gate stack to form a trench, depositing a cutting structure in the trench, and forming a first contact plug between the cutting structure and the second gate stack and a second contact plug between the second gate stack and the third gate stack. The fin structure is cut into two segments by the trench. A first dimension of the first contact plug in the first direction is greater than a second dimension of the second contact plug in the first direction.Type: ApplicationFiled: February 10, 2023Publication date: March 28, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Da-Zhi ZHANG, Chun-An LU, Chung-Yu CHIANG, Po-Nien CHEN, Hsiao-Han LIU, Jhon-Jhy LIAW, Chih-Yung LIN
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Publication number: 20240105521Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate having a base, a first fin, and a second fin over the base. The method includes forming a first trench in the base and between the first fin and the second fin. The method includes forming an isolation layer over the base and in the first trench. The first fin and the second fin are partially in the isolation layer. The method includes forming a first gate stack over the first fin and the isolation layer. The method includes forming a second gate stack over the second fin and the isolation layer. The method includes removing a bottom portion of the base. The isolation layer passes through the base after the bottom portion of the base is removed.Type: ApplicationFiled: February 9, 2023Publication date: March 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Da-Zhi ZHANG, Chung-Pin HUANG, Po-Nien CHEN, Hsiao-Han LIU, Jhon-Jhy LIAW, Chih-Yung LIN
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Publication number: 20240105481Abstract: The present invention provides a latching guide structure arranged inside a door of semiconductor carrier. The latching guide structure comprises an upper latching part, a lower latching part, at least one elastic unit and a driver. Moreover, a first guiding portion of the upper latching part is matched with a second guiding portion of the lower latching part, therefore to define the installation space for the at least one elastic unit. On the other hand, the driver simultaneously actuates an upper actuating unit of the first guiding portion and a lower actuating unit of the second guiding portion to linearly move in reverse direction therebetween. The range of the linear motion of the upper actuating unit and the lower actuating unit represents the compression or extension of the at least one elastic unit, determining to control the open/close status of the upper latching part and the lower latching part.Type: ApplicationFiled: November 28, 2022Publication date: March 28, 2024Inventors: MING-CHIEN CHIU, CHIH-MING LIN, CHENG-HAN CHOU, PO-TING LEE
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Patent number: 11943437Abstract: A method of decoding a bitstream by an electronic device is provided. A block unit is determined from an image frame received from the bitstream. An intra prediction mode index corresponding to one of wide-angle candidate modes is determined for the block unit. The electronic device determines whether the intra prediction mode index is different from predefined indices each corresponding to one of predefined wide-angle modes in the wide-angle candidate modes. Filtered samples are generated based on reference samples neighboring the block unit. The filtered samples are generated by an interpolation filter when the intra prediction mode index is different from the predefined indices. The filtered samples are generated by a reference filter when the intra prediction mode index is equal to at least one of the predefined indices. The block unit is reconstructed based on the filtered samples along a mode direction of the intra prediction mode index.Type: GrantFiled: July 12, 2022Date of Patent: March 26, 2024Assignee: FG Innovation Company LimitedInventors: Yu-Chiao Yang, Po-Han Lin
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Patent number: 11930199Abstract: A method of decoding a bitstream by an electronic device is provided. The method determines a block unit from an image frame received from the bitstream. To reconstruct the block unit, the method receives, from a candidate list, first motion information having a first list flag for selecting a first reference frame and second motion information having a second list flag for selecting a second reference frame. The method then stores a predefined one of the first and second motion information for a sub-block determined in the block unit when the first list flag is identical to the second list flag.Type: GrantFiled: January 24, 2022Date of Patent: March 12, 2024Assignee: FG Innovation Company LimitedInventors: Chih-Yu Teng, Yu-Chiao Yang, Po-Han Lin
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Publication number: 20240081077Abstract: A transistor includes a first semiconductor layer, a second semiconductor layer, a semiconductor nanosheet, a gate electrode and source and drain electrodes. The semiconductor nanosheet is physically connected to the first semiconductor layer and the second semiconductor layer. The gate electrode wraps around the semiconductor nanosheet. The source and drain electrodes are disposed at opposite sides of the gate electrode. The first semiconductor layer surrounds the source electrode, the second semiconductor layer surrounds the drain electrode, and the semiconductor nanosheet is disposed between the source and drain electrodes.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Applicants: Taiwan Semiconductor Manufacturing Company, Ltd., National Yang Ming Chiao Tung UniversityInventors: Po-Tsun Liu, Meng-Han Lin, Zhen-Hao Li, Tsung-Che Chiang, Bo-Feng Young, Hsin-Yi Huang, Sai-Hooi Yeong, Yu-Ming Lin
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Patent number: 11923409Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.Type: GrantFiled: August 5, 2021Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Li-Li Su, Wei-Min Liu
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Publication number: 20240065372Abstract: A triboelectric nanosensor includes an elastic body, a liquid metal and a wire. The elastic body includes an inner wall surrounding a chamber, and a plurality of biomimetic shark placoid scale-shaped microstructures adjacent to each other and disposed at at least one portion of the inner wall. The liquid metal is located within the chamber and surrounded by the elastic body. The wire is electrically connected to the liquid metal. The elastic body is pressed to be deformed and restores to change a contact state between the liquid metal and the biomimetic shark placoid scale-shaped microstructures, thereby allowing a plurality of electrons to flow into the liquid metal via the wire or to flow out from the liquid metal via the wire.Type: ApplicationFiled: November 10, 2022Publication date: February 29, 2024Inventors: Zong-Hong Lin, Cheng Yeh, Po-Han Wei, Fu-Cheng Kao
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Publication number: 20230386835Abstract: In a method of manufacturing a semiconductor device, a target layer to be patterned is formed over a substrate, a mask layer having an opening is formed over the target layer, the opening is enlarged in a first direction without enlarging the opening in a second direction crossing the first direction by a directional process, where the first and second directions are parallel to an upper surface of the substrate, and the target layer is patterned to form a hole corresponding to the opening.Type: ApplicationFiled: May 31, 2022Publication date: November 30, 2023Inventors: Po-Han LIN, Huan-Chieh CHANG
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Patent number: 11716116Abstract: A method includes: generating a first signal according to a digital signal; filtering the first signal according to first filter coefficients of first filter to generate a second signal; adding a first reference signal with the second signal to generate a third signal; performing digital-to-analog conversion according to the first and third signals to generate and output an echo signal; performing analog-to-digital conversion according to the echo signal to generate a fourth signal; generating a fifth signal according to the digital signal and the fourth signal; and updating the first filter coefficients according to the fifth signal.Type: GrantFiled: April 1, 2022Date of Patent: August 1, 2023Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Hsuan-Ting Ho, Liang-Wei Huang, Po-Han Lin, Chia-Lin Chang
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Publication number: 20220345700Abstract: A method of decoding a bitstream by an electronic device is provided. A block unit is determined from an image frame received from the bitstream. An intra prediction mode index corresponding to one of wide-angle candidate modes is determined for the block unit. The electronic device determines whether the intra prediction mode index is different from predefined indices each corresponding to one of predefined wide-angle modes in the wide-angle candidate modes. Filtered samples are generated based on reference samples neighboring the block unit. The filtered samples are generated by an interpolation filter when the intra prediction mode index is different from the predefined indices. The filtered samples are generated by a reference filter when the intra prediction mode index is equal to at least one of the predefined indices. The block unit is reconstructed based on the filtered samples along a mode direction of the intra prediction mode index.Type: ApplicationFiled: July 12, 2022Publication date: October 27, 2022Inventors: YU-CHIAO YANG, PO-HAN LIN
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Publication number: 20220321169Abstract: A method includes: generating a first signal according to a digital signal; filtering the first signal according to first filter coefficients of first filter to generate a second signal; adding a first reference signal with the second signal to generate a third signal; performing digital-to-analog conversion according to the first and third signals to generate and output an echo signal; performing analog-to-digital conversion according to the echo signal to generate a fourth signal; generating a fifth signal according to the digital signal and the fourth signal; and updating the first filter coefficients according to the fifth signal.Type: ApplicationFiled: April 1, 2022Publication date: October 6, 2022Inventors: HSUAN-TING HO, LIANG-WEI HUANG, PO-HAN LIN, CHIA-LIN CHANG
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Patent number: 11425374Abstract: A method of decoding a bitstream by an electronic device is provided. An image frame is received from the bitstream. A block unit is determined from the image frame. An intra prediction mode index corresponding to one of a plurality of wide-angle candidate modes each having an angle parameter is determined for the block unit based on the bitstream. A plurality of reference samples neighboring the block unit is determined. The electronic device determines whether the intra prediction mode index is different from predefined indices each corresponding to one of predefined wide-angle modes in the wide-angle candidate modes. A plurality of filtered samples is generated by an interpolation filter based on the reference samples when the intra prediction mode index is different from the predefined indices. The block unit is reconstructed based on the filtered samples along a mode direction of the intra prediction mode index.Type: GrantFiled: March 9, 2020Date of Patent: August 23, 2022Assignee: FG Innovation Company LimitedInventors: Yu-Chiao Yang, Po-Han Lin
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Publication number: 20220150520Abstract: A method of decoding a bitstream by an electronic device is provided. The method determines a block unit from an image frame received from the bitstream. To reconstruct the block unit, the method receives, from a candidate list, first motion information having a first list flag for selecting a first reference frame and second motion information having a second list flag for selecting a second reference frame. The method then stores a predefined one of the first and second motion information for a sub-block determined in the block unit when the first list flag is identical to the second list flag.Type: ApplicationFiled: January 24, 2022Publication date: May 12, 2022Inventors: CHIH-YU TENG, YU-CHIAO YANG, PO-HAN LIN
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Patent number: 11314410Abstract: The disclosure provides a mobile device. The mobile device includes a housing, at least one motion sensor disposed on the housing, a touchscreen disposed in the housing, and a processor electrically connected to the motion sensor and the touchscreen. The processor establishes first connection setting information between at least one virtual button in an application displayed on the touchscreen and the motion sensor, and performs a function of the virtual button in response to sensing of the motion sensor according to the first connection setting information. Therefore, the mobile device provides a better experience for a user.Type: GrantFiled: May 24, 2019Date of Patent: April 26, 2022Assignee: ASUSTEK COMPUTER INC.Inventor: Po-Han Lin