Abstract: A server includes a housing, a motherboard and at least one expansion module. The housing has an accommodation space and a front opening. The front opening is located at one side of the accommodation space and communicates with the accommodation space. The motherboard is located in the accommodation space and has at least one mainboard connector. The expansion module is removably disposed in the accommodation space and exposed to outside from the front opening. The expansion module includes a main body, a main connector and two fluid connectors. The main connector is disposed on the main body and removably assembled with the mainboard connector of the motherboard. The fluid connectors are disposed on the main body.

Abstract: A camera structure, including a lens holder, a lens frame and a plurality of balls. The lens holder has a holder body, one end of which has a first rolling groove. The first groove wall part and the second groove wall part are disposed on two sides of the first rolling groove, and the groove bottom is disposed between the first groove wall part and the second groove wall part. The lens frame is mounted on an outer side of the holder body. The plurality of balls are located inside the first rolling groove, wherein the first groove wall part and the second groove wall part support the plurality of balls, there is a gap between each of the plurality of balls and the groove bottom, and the plurality of balls lay between the lens holder and the lens frame.

Abstract: Systems and methods are provided for determining that the device is not reporting precise location information, based on output from one or more sensors determining that the device is located indoors and determining the altitude of the device. Based on the determination that the device is located indoors, suspending precise location services until it is determined that the device is back outdoors.

Abstract: Systems and methods are provided for determining that the device is not reporting precise location information, based on output from one or more sensors determining that the device is located indoors and determining the altitude of the device. Based on the determination that the device is located indoors, suspending precise location services until it is determined that the device is back outdoors.

Abstract: An automatic processing device for liquid samples includes a sample region, a control module, an image identification device and a centrifuge. The sample region is configured to accommodate a plurality of centrifuge tubes. The control module includes a mechanical module. The mechanical module is configured to unscrew or tighten upper caps of the centrifuge tubes, and is configured to draw liquid from the centrifuge tubes or discharge liquid to the centrifuge tubes. The image identification device is coupled to the control module. The centrifuge is coupled to the control module. The centrifuge is configured to accommodate the centrifuge tubes and perform centrifugal treatment.

Abstract: Systems and methods are provided for determining that the device is not reporting precise location information, based on output from one or more sensors determining that the device is located indoors and determining the altitude of the device. Based on the determination that the device is located indoors, suspending precise location services until it is determined that the device is back outdoors.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: A method for the surface treatment of a corrosion-resistant nickel-based alloy and the resulting surface structure of the treated alloy is disclosed. The method includes immersing a nickel-based alloy in a first neutral or alkaline solution to remove surface contaminants, followed by immersing the cleaned alloy in a second neutral or alkaline solution to form functional groups on its surface. Subsequently, a low-temperature heat treatment is performed to form a passivation layer on the surface of the nickel-based alloy. The passivation layer has a surface roughness of less than 0.04 microns and a thickness ranging from 5 nanometers to 200 nanometers. The resulting corrosion-resistant nickel-based alloy comprises a substrate made of the nickel-based alloy and a passivation layer established on at least one surface of the substrate. The nickel content of the alloy is greater than 50%, and the alloy may also contain additional metallic components such as chromium (Cr) and manganese (Mn).

Abstract: The present invention relates to a method for measuring muscle mass, including: a first selection step, wherein a frame selection information is obtained by using a frame to select a fascia region from a provided computed tomography image under the condition that the window width ranges from 300 HU to 500 HU and the window level ranges from 40 HU to 50 HU, wherein the selected range of the fascia region includes a muscle; and a second selection step, wherein a muscle information of the muscle is obtained by calculating a pixel value in the frame-selected fascia region under the condition that the HU value of the CT image ranges from ?29 HU to 150 HU.

Abstract: Provide a micro-light-emitting package includes a first substrate, a plurality of micro-light-emitting diodes (micro-LEDs), a transparent protective layer, and a plurality of conductive pads. The first substrate has an upper surface and a lower surface opposite to each other. The micro-LEDs are disposed on the upper surface of the first substrate. The micro-LEDs have a first electrode and a second electrode electrically opposite to the first electrode. The transparent protective layer covers the micro-LEDs. The plurality of conductive pads are disposed on the lower surface of the first substrate. The conductive pads include a first conductive pad, a second conductive pad, a third conductive pad, and a fourth conductive pad. The first conductive pad, the second conductive pad, the third conductive pad respectively electrically connected to the corresponding first electrode of the micro-LEDs. The fourth conductive pad is commonly electrically connected to the second electrode of the plurality of micro-LEDs.

Abstract: A school admission prediction system and method are provided. The system includes a user interface for receiving personal data from an applicant, including academic and activity data. A data acquisition module connected to the user interface acquires this personal data. A data preprocessing module connected to the data acquisition module preprocesses the academic and activity data. An attribute selection module connected to the data preprocessing module extracts multiple attributes from the preprocessed data. A machine learning model generates an evaluation report based on the extracted attributes. This report includes a prediction of whether the applicant will be admitted to the school. The system also includes a loss calculation module for evaluating the performance of the machine learning model and optimizing its parameters based on the evaluation results. The method and system provide a reliable and efficient way to predict school admissions, helping applicants to better prepare their applications.

Abstract: A semiconductor memory structure includes a substrate, a bit line disposed on the substrate, a dielectric liner disposed on a side of the bit line, and a capacitor contact and a filler disposed on the substrate. The bit line extends in a first direction. The dielectric liner includes a first nitride liner disposed on a sidewall of the bit line, an oxide liner disposed on a sidewall of the first nitride liner, and a second nitride liner disposed on a sidewall of the oxide liner. In a second direction perpendicular to the first direction, the capacitor contact is spaced apart from the bit line by the first nitride liner, the oxide liner, and the second nitride liner, and the width of the filler is greater than the width of the capacitor contact. A method for forming the semiconductor memory structure is also provided.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Abstract: A method includes forming a stack of material layers to cover an array region and a periphery region of a substrate. A first patterned mask layer is formed, and the pattern of the first patterned mask layer is transferred to the stack of material layers, thereby forming a first array pattern and a first periphery pattern respectively in the array and periphery regions. A second patterned mask layer is provided above the first array and periphery patterns. The pattern of the second patterned mask is not aligned with the pattern of the first patterned mask. The pattern of the second patterned mask layer is transferred to form the first and second sacrificial patterns respectively in the array and periphery regions. The first array pattern, the first and second sacrificial patterns, and the first periphery pattern are simultaneously transferred to form a second array pattern and a second periphery pattern.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Abstract: A method includes forming a stack of material layers to cover an array region and a periphery region of a substrate. A first patterned mask layer is formed, and the pattern of the first patterned mask layer is transferred to the stack of material layers, thereby forming a first array pattern and a first periphery pattern respectively in the array and periphery regions. A second patterned mask layer is provided above the first array and periphery patterns. The pattern of the second patterned mask is not aligned with the pattern of the first patterned mask. The pattern of the second patterned mask layer is transferred to form the first and second sacrificial patterns respectively in the array and periphery regions. The first array pattern, the first and second sacrificial patterns, and the first periphery pattern are simultaneously transferred to form a second array pattern and a second periphery pattern.

Abstract: A semiconductor memory structure includes a substrate, a bit line disposed on the substrate, a dielectric liner disposed on a side of the bit line, and a capacitor contact and a filler disposed on the substrate. The bit line extends in a first direction. The dielectric liner includes a first nitride liner disposed on a sidewall of the bit line, an oxide liner disposed on a sidewall of the first nitride liner, and a second nitride liner disposed on a sidewall of the oxide liner. In a second direction perpendicular to the first direction, the capacitor contact is spaced apart from the bit line by the first nitride liner, the oxide liner, and the second nitride liner, and the width of the filler is greater than the width of the capacitor contact. A method for forming the semiconductor memory structure is also provided.

Abstract: A portable medical education device, medical education platform, and medical education methods are disclosed. The medical education portable device enables a camera to capture a specific picture to generate an image, extracts several features from the image, converts the features into an identification code, and transmits the identification code to the medical education platform. The medical education platform stores several three-dimensional medical models and finds a specific three-dimensional medical model from the three-dimensional medical models according to the identification code, wherein the preset code corresponding to the specific three-dimensional medical model is the same as the identification code.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.