Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.

Abstract: A timing controller adapted to a flat display includes a voltage detecting circuit, a clock generator, a first multiplexer and a second multiplexer. The voltage detecting circuit detects a variation of an operating voltage and thus outputs a reset signal. The clock generator outputs a start signal and a first clock signal. The first multiplexer is controlled by the reset signal and coupled to the start signal and a constant voltage. The second multiplexer is controlled by the reset signal and coupled to the first clock signal and a second clock signal. A frequency of the second clock signal is obviously higher than a frequency of the first clock signal.

Abstract: A method of transmitting data from a timing controller to a source driving device in a liquid crystal display is disclosed. The method of the present invention comprises the steps of: (a) providing a setup/hold time; (b) transmitting a test pattern from the timing controller to the source driving device using the setup/hold time; (c) returning an acknowledge signal from the source driving device to the timing controller when the test pattern is successfully received by the source driving device; (d) providing a new setup/hold time and repeating Steps (b) and (c) using the new setup/hold time when the test pattern is not successfully received by the source driving device; and (e) transmitting the image data from the timing controller to the source driving device using the new setup/hold time upon receipt of the acknowledge signal. Therefore, the use of the setup/hold time adjustment pins is eliminated.

Abstract: An apparatus to eliminate the power-off image noise of a flat panel display has a reset circuit and a switching device. The reset circuit asserts a switch signal when the flat panel display is turned off. The switching device decouples a source driver from several latch signals generated by a timing controller when the switch signal is asserted.

Abstract: A method of transmitting data from a timing controller to a source driving device in a liquid crystal display is disclosed. The method of the present invention comprises the steps of: (a) providing a setup/hold time; (b) transmitting a test pattern from the timing controller to the source driving device using the setup/hold time; (c) returning an acknowledge signal from the source driving device to the timing controller when the test pattern is successfully received by the source driving device; (d) providing a new setup/hold time and repeating Steps (b) and (c) using the new setup/hold time when the test pattern is not successfully received by the source driving device; and (e) transmitting the image data from the timing controller to the source driving device using the new setup/hold time upon receipt of the acknowledge signal. Therefore, the use of the setup/hold time adjustment pins is eliminated.

Abstract: A timing controller adapted to a flat display includes a voltage detecting circuit, a clock generator, a first multiplexer and a second multiplexer. The voltage detecting circuit detects a variation of an operating voltage and thus outputs a reset signal. The clock generator outputs a start signal and a first clock signal. The first multiplexer is controlled by the reset signal and coupled to the start signal and a constant voltage. The second multiplexer is controlled by the reset signal and coupled to the first clock signal and a second clock signal. A frequency of the second clock signal is obviously higher than a frequency of the first clock signal.

Abstract: A method for charge sharing between source lines of a pixel array. The method includes the steps of grouping the source lines into pairs, implementing charge sharing if data polarities of a currently and a last scanned row are different; otherwise, in each pair of the source lines, estimating a first and second energy driving the two source lines respectively with and without a preliminary charge sharing, and implementing charge sharing only if the first energy is smaller than the second energy.

Abstract: A method for charge sharing between source lines of a pixel array. The method includes the steps of grouping the source lines into pairs, implementing charge sharing if data polarities of a currently and a last scanned row are different; otherwise, in each pair of the source lines, estimating a first and second energy driving the two source lines respectively with and without a preliminary charge sharing, and implementing charge sharing only if the first energy is smaller than the second energy.