Patents by Inventor Po-Hsien Yen

Po-Hsien Yen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240021600
    Abstract: Systems and methods for an integrated circuit layout is disclosed. The integrated circuit layout includes a first block including multiple first cells, each of which has a first cell height, and a second block including multiple second cells, each of which has a second cell height. The first block is disposed next to the second block with a spacing that is either equal to zero or less than any of the first or second cell heights.
    Type: Application
    Filed: July 12, 2022
    Publication date: January 18, 2024
    Applicant: Taiwan Semicondutor Manufacturing Company, Ltd.
    Inventors: Po-Hsien Yen, Jia-Hong Gao, Hui-Zhong Zhuang, Jung-Chan Yang