Patents by Inventor Po-Hsuan CHEN
Po-Hsuan CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12235197Abstract: An automatic processing device for liquid samples includes a sample region, a control module, an image identification device and a centrifuge. The sample region is configured to accommodate a plurality of centrifuge tubes. The control module includes a mechanical module. The mechanical module is configured to unscrew or tighten upper caps of the centrifuge tubes, and is configured to draw liquid from the centrifuge tubes or discharge liquid to the centrifuge tubes. The image identification device is coupled to the control module. The centrifuge is coupled to the control module. The centrifuge is configured to accommodate the centrifuge tubes and perform centrifugal treatment.Type: GrantFiled: April 21, 2021Date of Patent: February 25, 2025Assignees: CANCER FREE BIOTECH LTD., SONGYI SYSTEM CO., LTD.Inventors: Po-Han Chen, Shih-Pei Wu, Yi-Hsuan Chen, Chung-I Chen, Chun-Chieh Chiang, Chi-Ming Lee
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Publication number: 20250033965Abstract: A hypochlorous acid preparation system is provided. The hypochlorous acid preparation system includes: a hypochlorous acid preparation apparatus comprising: a first inlet, wherein sulfuric acid collected from a clean room located in a semiconductor fabrication plant enters the hypochlorous acid preparation apparatus through the first inlet; a second inlet, wherein sodium hypochlorite solution enters the hypochlorous acid preparation apparatus through the second inlet; a third inlet, wherein deionized water enters the hypochlorous acid preparation apparatus through the third inlet; and an outlet, wherein hypochlorous acid is produced in situ by mixing the sulfuric acid, the sodium hypochlorite solution, and the deionized water and exits the hypochlorous acid preparation apparatus through the outlet.Type: ApplicationFiled: July 28, 2023Publication date: January 30, 2025Inventors: Chun-Ming Wang, Hsien-Li He, Cheng-Chieh Chen, Po-Hsuan Huang, Wan-Yu Chao
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Publication number: 20250037858Abstract: The present invention disclose a medical image-based system for predicting lesion classification and a method thereof. The system comprises a feature data extracting module for providing a raw feature data based on a medical image, and a predicting module for outputting a predicted class and a risk index according to the raw feature data. The predicting module comprises a classification unit for generating the predicted class and a prediction score corresponding thereto according to the raw feature data, and a risk evaluation unit for generating the risk index according to the prediction score. The system provides medical personnels a reference score and a risk index to determine progression of a certain disease.Type: ApplicationFiled: February 1, 2024Publication date: January 30, 2025Inventors: YI-SHAN TSAI, YU-HSUAN LAI, CHENG-SHIH LAI, CHAO-YUN CHEN, MENG-JHEN WU, YI-CHUAN LIN, YI-TING CHIANG, PENG-HAO FANG, PO-TSUN KUO, YI-CHIH CHIU
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Patent number: 12207962Abstract: The present invention relates to a method for measuring muscle mass, including: a first selection step, wherein a frame selection information is obtained by using a frame to select a fascia region from a provided computed tomography image under the condition that the window width ranges from 300 HU to 500 HU and the window level ranges from 40 HU to 50 HU, wherein the selected range of the fascia region includes a muscle; and a second selection step, wherein a muscle information of the muscle is obtained by calculating a pixel value in the frame-selected fascia region under the condition that the HU value of the CT image ranges from ?29 HU to 150 HU.Type: GrantFiled: April 20, 2022Date of Patent: January 28, 2025Assignee: National Cheng Kung UniversityInventors: Yi-Shan Tsai, Yu-Hsuan Lai, Bow Wang, Cheng-Shih Lai, Chao-Yun Chen, Meng-Jhen Wu, Po-Tsun Kuo, Tsung-Han Lee
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Publication number: 20250029978Abstract: An electrode for a lithium-ion battery is provided, which comprises: a current collector; and an electrode material layer disposed on the current collector, wherein the electrode material layer comprises an anode material and a binder, the binder is pectin, its derivative or a combination thereof, and the anode material is selected from the group consisting of lithium vanadium oxide, lithium titanium oxide, lithium iron oxide, graphite, and a combination thereof. In addition, a lithium-ion battery comprising the aforesaid electrode is also provided.Type: ApplicationFiled: July 17, 2023Publication date: January 23, 2025Inventors: Maw-Kuan WU, Yu-Hsuan SU, Chin-Yi CHUNG, Yan-Reui CHEN, Feng-Yu WU, Po-Wei CHI, Phillip M. WU
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Patent number: 12183995Abstract: An antenna structure and an electronic apparatus are provided. The antenna structure includes a substrate, a first radiation part, and a second radiation part. The substrate has a first surface and a second surface opposite to each other. The first radiation part is disposed on the first surface. The first radiation part is an absorber material. The second radiation part is disposed on the second surface. The second radiation part is coupled to a feeding part. There is a distance between the second radiation part and the first radiation part, so as to excite a first resonance mode through the coupling of the second radiation part to the first radiation part. Accordingly, the specific absorption rate (SAR) value of the electromagnetic wave is reduced.Type: GrantFiled: October 4, 2022Date of Patent: December 31, 2024Assignee: COMPAL ELECTRONICS, INC.Inventors: Ta-Hong Cheng, Yen-Hao Yu, Shih-Chia Liu, Po-Hsuan Chen, Jui-Hung Lai
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Publication number: 20240127444Abstract: One example method for biomarker detection in digitized pathology samples includes receiving a plurality of image patches corresponding to an image of a pathology slide having a hematoxylin and eosin-stained (“H&E”) stained sample of tissue, each image patch representing a different portion of the image; for each image patch, determining, using a first trained machine learning (“ML”) model, a patch biomarker status; and determining, using a second trained ML model, a tissue sample biomarker status for the sample of tissue based on the patch biomarker statuses of the image patches.Type: ApplicationFiled: February 11, 2022Publication date: April 18, 2024Applicant: Verily Life Sciences LLCInventors: Craig Mermel, Po-Hsuan Chen, David F. Steiner, Ronnachai Jaroensri, Paul Gamble, Fraser Tan
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Publication number: 20230377847Abstract: A spot type atmospheric pressure plasma device includes a metal casing, a metal electrode, a dielectric layer, and a gas channel. The metal electrode is disposed in an inner space of the metal casing. The dielectric layer is disposed in the inner space and surrounds an outer side surface of the metal electrode. A central area of a bottom of the dielectric layer has a plasma jet, and a bottom of the metal electrode is adjacent to the plasma jet. The gas channel includes a first section, a second section, and a third section. The first section passes through the metal casing and the dielectric layer. The second section is connected to the first section and extends between the dielectric layer and the outer side surface. The third section is connected to the second section, and is configured to direct a working gas to the plasma jet.Type: ApplicationFiled: May 20, 2022Publication date: November 23, 2023Inventors: Yi-Ming HSU, Liang-Chun WANG, Yung-Hao CHEN, Po-Hsuan CHEN, Wen-Chieh TAN, Huang-Wei CHEN
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Publication number: 20230377846Abstract: A wide area atmospheric pressure plasma device includes a metal casing, a metal electrode, and a dielectric layer. The metal casing includes a chamber, at least one gas channel, and a plasma jet channel, in which the plasma jet channel is located under the chamber. The metal electrode is disposed within the chamber, is adjacent to the plasma jet channel, and extends along a length direction of the plasma jet channel. An outlet of the gas channel is adjacent to a bottom of the metal electrode, such that a working gas in the gas channel is sprayed towards the bottom of the metal electrode. The dielectric layer wraps the metal electrode.Type: ApplicationFiled: May 19, 2022Publication date: November 23, 2023Inventors: Yi-Ming HSU, Liang-Chun WANG, Yung-Hao CHEN, Po-Hsuan CHEN, Shih-Chang WANG, Huang-Wei CHEN
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Publication number: 20230118456Abstract: An antenna structure and an electronic apparatus are provided. The antenna structure includes a substrate, a first radiation part, and a second radiation part. The substrate has a first surface and a second surface opposite to each other. The first radiation part is disposed on the first surface. The first radiation part is an absorber material. The second radiation part is disposed on the second surface. The second radiation part is coupled to a feeding part. There is a distance between the second radiation part and the first radiation part, so as to excite a first resonance mode through the coupling of the second radiation part to the first radiation part. Accordingly, the specific absorption rate (SAR) value of the electromagnetic wave is reduced.Type: ApplicationFiled: October 4, 2022Publication date: April 20, 2023Applicant: COMPAL ELECTRONICS, INC.Inventors: Ta-Hong Cheng, Yen-Hao Yu, Shih-Chia Liu, Po-Hsuan Chen, Jui-Hung Lai
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Patent number: 11600709Abstract: A memory cell includes a substrate. A first STI and a second STI are embedded within the substrate. The first STI and the second STI extend along a first direction. An active region is disposed on the substrate and between the first STI and the second STI. A control gate is disposed on the substrate and extends along a second direction. The first direction is different from the second direction. A tunneling region is disposed in the active region overlapping the active region. A first trench is embedded within the tunneling region. Two second trenches are respectively embedded within the first STI and the second STI. The control gate fills in the first trench and the second trenches. An electron trapping stack is disposed between the tunneling region and the control gate.Type: GrantFiled: June 30, 2022Date of Patent: March 7, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Hao Pan, Chi-Cheng Huang, Kuo-Lung Li, Szu-Ping Wang, Po-Hsuan Chen, Chao-Sheng Cheng
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Publication number: 20220336606Abstract: A memory cell includes a substrate. A first STI and a second STI are embedded within the substrate. The first STI and the second STI extend along a first direction. An active region is disposed on the substrate and between the first STI and the second STI. A control gate is disposed on the substrate and extends along a second direction. The first direction is different from the second direction. A tunneling region is disposed in the active region overlapping the active region. A first trench is embedded within the tunneling region. Two second trenches are respectively embedded within the first STI and the second STI. The control gate fills in the first trench and the second trenches. An electron trapping stack is disposed between the tunneling region and the control gate.Type: ApplicationFiled: June 30, 2022Publication date: October 20, 2022Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chih-Hao Pan, Chi-Cheng Huang, Kuo-Lung Li, Szu-Ping Wang, Po-Hsuan Chen, Chao-Sheng Cheng
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Publication number: 20220271137Abstract: A memory cell includes a substrate. A first STI and a second STI are embedded within the substrate. The first STI and the second STI extend along a first direction. An active region is disposed on the substrate and between the first STI and the second STI. A control gate is disposed on the substrate and extends along a second direction. The first direction is different from the second direction. A tunneling region is disposed in the active region overlapping the active region. A first trench is embedded within the tunneling region. Two second trenches are respectively embedded within the first STI and the second STI. The control gate fills in the first trench and the second trenches. An electron trapping stack is disposed between the tunneling region and the control gate.Type: ApplicationFiled: March 31, 2021Publication date: August 25, 2022Inventors: Chih-Hao Pan, Chi-Cheng Huang, Kuo-Lung Li, Szu-Ping Wang, Po-Hsuan Chen, Chao-Sheng Cheng
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Patent number: 11417742Abstract: A memory cell includes a substrate. A first STI and a second STI are embedded within the substrate. The first STI and the second STI extend along a first direction. An active region is disposed on the substrate and between the first STI and the second STI. A control gate is disposed on the substrate and extends along a second direction. The first direction is different from the second direction. A tunneling region is disposed in the active region overlapping the active region. A first trench is embedded within the tunneling region. Two second trenches are respectively embedded within the first STI and the second STI. The control gate fills in the first trench and the second trenches. An electron trapping stack is disposed between the tunneling region and the control gate.Type: GrantFiled: March 31, 2021Date of Patent: August 16, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Hao Pan, Chi-Cheng Huang, Kuo-Lung Li, Szu-Ping Wang, Po-Hsuan Chen, Chao-Sheng Cheng
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Patent number: 11374109Abstract: A method for fabricating gate structures includes providing a substrate, configured to have a first region and a second region. Dummy gate structures are formed on the substrate at the first and second regions, wherein each of the dummy gate structures has a first gate insulating layer on the substrate and a dummy gate on the first gate insulating layer. An inter-layer dielectric layer is formed over the dummy gate structures. The inter-layer dielectric layer is polished to expose all of the dummy gates. The dummy gates are removed. The first gate insulating layer at the second region is removed. A second gate insulating layer is formed on the substrate at the second region, wherein the first gate insulating layer is thicker than the second insulating layer. Metal gates are formed on the first and the second insulating layer.Type: GrantFiled: October 31, 2019Date of Patent: June 28, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Hao Pan, Chi-Cheng Huang, Kuo-Lung Li, Szu-Ping Wang, Po-Hsuan Chen, Chao-Sheng Cheng
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Patent number: 11362186Abstract: A non-volatile memory device is provided. The non-volatile memory device includes a substrate, a first gate structure disposed on the substrate, a second gate structure disposed on the substrate, and a memory gate structure disposed on the substrate and between the first gate structure and the second gate structure. The memory gate structure at least covers the first gate structure and the second gate structure. The memory gate structure includes a charge storage layer disposed on the substrate and a memory gate layer disposed on the charge storage layer.Type: GrantFiled: March 27, 2020Date of Patent: June 14, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Lung Li, Chih-Hao Pan, Szu-Ping Wang, Po-Hsuan Chen, Chi-Cheng Huang
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Patent number: 11340669Abstract: A dustproof device for laptops comprises a heat dissipating device disposed in a laptop to form a dustproof device for the same, wherein the heat dissipating device is disposed on a main computing unit in an interior of the laptop; the heat dissipating device includes a fan set and a heat dissipating fin. The fan set includes a housing, a rotating section and a guiding device, wherein on a lateral side of the housing is disposed an opening, the rotating section is disposed inside the housing, the guiding device is disposed inside the housing between the rotating section and a lateral side of the opening, and a dust removing path is formed between the guiding device and an inner wall surface of the housing adjacent to the guiding device.Type: GrantFiled: July 7, 2020Date of Patent: May 24, 2022Assignee: CLEVO CO.Inventors: Wei-Cheng Liao, Po-Hsuan Chen
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Publication number: 20210265474Abstract: A non-volatile memory device is provided. The non-volatile memory device includes a substrate, a first gate structure disposed on the substrate, a second gate structure disposed on the substrate, and a memory gate structure disposed on the substrate and between the first gate structure and the second gate structure. The memory gate structure at least covers the first gate structure and the second gate structure. The memory gate structure includes a charge storage layer disposed on the substrate and a memory gate layer disposed on the charge storage layer.Type: ApplicationFiled: March 27, 2020Publication date: August 26, 2021Applicant: United Microelectronics Corp.Inventors: Kuo-Lung Li, Chih-Hao Pan, Szu-Ping Wang, Po-Hsuan Chen, Chi-Cheng Huang
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Publication number: 20210134979Abstract: A method for fabricating gate structures includes providing a substrate, configured to have a first region and a second region. Dummy gate structures are formed on the substrate at the first and second regions, wherein each of the dummy gate structures has a first gate insulating layer on the substrate and a dummy gate on the first gate insulating layer. An inter-layer dielectric layer is formed over the dummy gate structures. The inter-layer dielectric layer is polished to expose all of the dummy gates. The dummy gates are removed. The first gate insulating layer at the second region is removed. A second gate insulating layer is formed on the substrate at the second region, wherein the first gate insulating layer is thicker than the second insulating layer. Metal gates are formed on the first and the second insulating layer.Type: ApplicationFiled: October 31, 2019Publication date: May 6, 2021Applicant: United Microelectronics Corp.Inventors: Chih-Hao Pan, Chi-Cheng Huang, Kuo-Lung Li, Szu-Ping Wang, Po-Hsuan Chen, Chao-Sheng Cheng
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Publication number: 20210096617Abstract: A dustproof device for laptops comprises a heat dissipating device disposed in a laptop to form a dustproof device for the same, wherein the heat dissipating device is disposed on a main computing unit in an interior of the laptop; the heat dissipating device includes a fan set and a heat dissipating fin. The fan set includes a housing, a rotating section and a guiding device, wherein on a lateral side of the housing is disposed an opening, the rotating section is disposed inside the housing, the guiding device is disposed inside the housing between the rotating section and a lateral side of the opening, and a dust removing path is formed between the guiding device and an inner wall surface of the housing adjacent to the guiding device.Type: ApplicationFiled: July 7, 2020Publication date: April 1, 2021Inventors: Wei-Cheng LIAO, Po-Hsuan CHEN