Abstract: In an embodiment, a device includes: a package component including: integrated circuit dies; an encapsulant around the integrated circuit dies; a redistribution structure over the encapsulant and the integrated circuit dies, the redistribution structure being electrically coupled to the integrated circuit dies; sockets over the redistribution structure, the sockets being electrically coupled to the redistribution structure; and a support ring over the redistribution structure and surrounding the sockets, the support ring being disposed along outermost edges of the redistribution structure, the support ring at least partially laterally overlapping the redistribution structure.

Abstract: A link down detector and a link down detecting method for Ethernet are provided. The link down detecting method includes the following steps. Firstly, a received signal is received, and a high-frequency band signal is extracted from the received signal. Consequently, the high-frequency band signal is formed as an extraction signal. Then, a high-frequency band power value of the extraction signal is calculated, and a full band power value of the received signal is calculated. Then, a ratio value of the high-frequency band power value to the full band power value is calculated. In a link up status, if the ratio value is changed dramatically in a specified time, a link down signal is asserted to indicate that a network device connected to the Ethernet is switched to a link down status.

Abstract: A memory device and a method for manufacturing the memory device are provided. The memory device includes a stack and a plurality of memory strings. The stack is disposed on the substrate, and the stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. The memory strings pass through the stack along a first direction, wherein a first memory string in the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are separated from each other. The channel layer is disposed between the first conductive pillar and the second conductive pillar. The memory structure surrounds the second conductive pillar, and the memory structure includes a resistive memory material.

Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, selectively exposing the photoresist layer to an EUV radiation, and developing the selectively exposed photoresist layer. The photoresist layer has a composition including a solvent and a photo-active compound dissolved in the solvent and composed of a molecular cluster compound incorporating hexameric tin and two chloro ligands.