Abstract: A method for forming a package structure is provided. The method includes disposing a semiconductor die over a carrier substrate, wherein a removable film is formed over the semiconductor die, disposing a first stacked die package structure over the carrier substrate, wherein a top surface of the removable film is higher than a top surface of the first stacked die package structure, and removing the removable film to expose a top surface of the semiconductor die, wherein a top surface of the semiconductor die is lower than the top surface of the first stacked die package structure.

Abstract: Semiconductor devices and methods of manufacture which utilize lids in order to constrain thermal expansion during annealing are presented. In some embodiments lids are placed and attached on encapsulant and, in some embodiments, over first semiconductor dies. As such, when heat is applied, and the encapsulant attempts to expand, the lid will work to constrain the expansion, reducing the amount of stress that would otherwise accumulate within the encapsulant.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.

Abstract: A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts top surfaces of the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.

Abstract: A surge protection system includes a receptacle body, at least one power output jack, a power obtaining device, at least one surge protection module, a microcontroller unit, and a surge detection circuit. The at least one surge protection module includes a housing, a memory element, and a surge protection circuit that includes a surge absorption element and a thermal fuse connected in series and parallel. The surge absorption element absorbs a surge inputted from an external power supply, and the memory element records a number of surges carried by the surge absorption element. When the surge enters the surge protection system from the external power supply, the surge absorption element absorbs the surge, and the surge detection circuit outputs a signal to the microcontroller unit that writes the number of surges carried by the surge absorption element into the memory element.

Abstract: A semiconductor memory device includes a substrate having a memory area and a logic circuit area thereon, a first interlayer dielectric layer on the substrate, and a second interlayer dielectric layer on the substrate. An embedded memory cell structure is disposed within the memory area between the first interlayer dielectric layer and the second interlayer dielectric layer. The second interlayer dielectric layer includes a first portion covering the embedded memory cell structure within the memory area and a second portion covering the logic circuit area. A top surface of the first portion is coplanar with a top surface of the second portion.

Abstract: A semiconductor package is provided, which includes a first chip disposed over a first package substrate, a molding compound surrounding the first chip, a first thermal interface material disposed over the first chip and the molding compound, a heat spreader disposed over the thermal interface material, and a second thermal interface material disposed over the heat spreader. The first thermal interface material and the second thermal interface material have an identical width.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: A hybrid random access memory for a system-on-chip (SOC), including a semiconductor substrate with a MRAM region and a ReRAM region, a first dielectric layer on the semiconductor substrate, multiple ReRAM cells in the first dielectric layer on the ReRAM region, a second dielectric layer above the first dielectric layer, and multiple MRAM cells in the second dielectric layer on the MRAM region.

Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.

Abstract: A method for forming a package structure is provided, including forming an interconnect structure over a carrier substrate and forming a semiconductor die over a first side of the interconnect structure. A removable film is formed over the semiconductor die. The method includes forming a first stacked die package structure over the first side of the interconnect structure. A top surface of the removable film is higher than a top surface of the first stacked die package structure. The method includes forming a package layer, removing a portion of the package layer to expose a portion of the removable film, removing the removable film to form a recess, forming a lid structure over the semiconductor die and the first stacked die package structure. The lid structure has a main portion and a protruding portion disposed in the recess and extending from the main portion.

Abstract: A surge protection system includes a receptacle body, at least one power output jack, a power obtaining device, at least one surge protection module, a microcontroller unit, and a surge detection circuit. The at least one surge protection module includes a housing, a memory element, and a surge protection circuit that includes a surge absorption element and a thermal fuse connected in series and parallel. The surge absorption element absorbs a surge inputted from an external power supply, and the memory element records a number of surges carried by the surge absorption element. When the surge enters the surge protection system from the external power supply, the surge absorption element absorbs the surge, and the surge detection circuit outputs a signal to the microcontroller unit that writes the number of surges carried by the surge absorption element into the memory element.

Abstract: An audio transmission line having an audio transmission plug and an inline controller and a headset is disclosed In the inline controller, one signal input end of signal input module is coupled to one signal transmission unit of the audio transmission plug. The first control part mechanically links up the first and second conductive part, for controlling the input end of first conductive part for connecting with several signal input ends of signal input module, and controlling the output end of the first conductive part for connecting with the input end of one wire circuit, or, controlling the input end of the second conductive part for connecting with the output end of the same wire circuit, and controlling the output end of the second conductive part for connecting with signal output ends of signal output module.

Abstract: An audio transmission line having an audio transmission plug and an inline controller and a headset is disclosed In the inline controller, one signal input end of signal input module is coupled to one signal transmission unit of the audio transmission plug. The first control part mechanically links up the first and second conductive part, for controlling the input end of first conductive part for connecting with several signal input ends of signal input module, and controlling the output end of the first conductive part for connecting with the input end of one wire circuit, or, controlling the input end of the second conductive part for connecting with the output end of the same wire circuit, and controlling the output end of the second conductive part for connecting with signal output ends of signal output module.

Abstract: An ocean thermal energy conversion (OTEC) system includes a working fluid pump, an evaporator, a turbine, a condenser, and a working fluid. The evaporator is connected to the working fluid pump. The turbine is connected to the evaporator. The condenser is respectively connected to the turbine and the working fluid pump, and located in a sea area below sea surface. The condenser includes a condenser main body and a deep sea water pipe. The condenser main body is respectively connected to the turbine and the working fluid pump. The deep sea water pipe is connected to the condenser main body, and has an inlet end and an outlet end. The deep sea water pipe is connected to the condenser main body via the outlet end. The working fluid flows between the working fluid pump, the evaporator, the turbine, and the condenser under the driven of the working fluid pump.

Abstract: An ocean thermal energy conversion (OTEC) system includes a working fluid pump, an evaporator, a turbine, a condenser, and a working fluid. The evaporator is connected to the working fluid pump. The turbine is connected to the evaporator. The condenser is respectively connected to the turbine and the working fluid pump, and located in a sea area below sea surface. The condenser includes a condenser main body and a deep sea water pipe. The condenser main body is respectively connected to the turbine and the working fluid pump. The deep sea water pipe is connected to the condenser main body, and has an inlet end and an outlet end. The deep sea water pipe is connected to the condenser main body via the outlet end. The working fluid flows between the working fluid pump, the evaporator, the turbine, and the condenser under the driven of the working fluid pump.