Patents by Inventor Po-Hung Li

Po-Hung Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984485
    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
  • Publication number: 20240069654
    Abstract: A touchpad device includes a substrate and a touch panel. The substrate includes a main plate, a first limiting plate, and a first flexible member. The main plate has a long side and a short side. The first limiting plate has a first stopping portion, the first flexible member is integrally connected between the long side and the first limiting plate, and the first limiting plate is adjacent to the short side. The touch panel is disposed above the substrate. The touch panel has a bottom surface, a pivot side of the bottom surface is disposed on the main plate, the first limiting plate of the substrate is fixed on the bottom surface and adjacent to a first side of the bottom surface, and the first stopping portion of the first limiting plate protrudes from an edge portion of the first side.
    Type: Application
    Filed: August 9, 2023
    Publication date: February 29, 2024
    Inventors: Po-Chun Hou, Po-Hsin Li, Chi-Hung Cheng
  • Patent number: 9341660
    Abstract: The present invention provides a load impedance estimation and repetitive control method capable of allowing inductance variation for an inverter, wherein the method is applied for predicting corresponding next-period switching duty cycles for four switching member sets of the inverter by way of sampling three phase voltages and calculating next-period voltage compensations based on the previous line-period voltage compensations. Moreover, during the calculation and prediction, the method also involves the inductance variations of the output inductors of the inverter into the load impedance estimation matrix equation. Therefore, the three phases four wires inverter with the presented load impedance estimation and repetitive control method can provide a steady output voltage to the loads even if the originally-connected loads are replaced with other different loads.
    Type: Grant
    Filed: July 4, 2014
    Date of Patent: May 17, 2016
    Assignee: National Tsing Hua University
    Inventors: Tsai-Fu Wu, Li-Chiun Lin, Chih-Hao Chang, Po-Hung Li
  • Publication number: 20150311818
    Abstract: The present invention provides a load impedance estimation and repetitive control method capable of allowing inductance variation for an inverter, wherein the method is applied for predicting corresponding next-period switching duty cycles for four switching member sets of the inverter by way of sampling three phase voltages and calculating next-period voltage compensations based on the previous line-period voltage compensations. Moreover, during the calculation and prediction, the method also involves the inductance variations of the output inductors of the inverter into the load impedance estimation matrix equation. Therefore, the three phases four wires inverter with the presented load impedance estimation and repetitive control method can provide a steady output voltage to the loads even if the originally-connected loads are replaced with other different loads.
    Type: Application
    Filed: July 4, 2014
    Publication date: October 29, 2015
    Inventors: Tsai-Fu Wu, Li-Chiun Lin, Chih-Hao Chang, Po-Hung Li