Abstract: This disclosure relates to a combined power module that includes a base structure, a terminal structure, a second terminal, and a cover. The terminal structure includes a mount assembly and a plurality of first terminals. The mount assembly is assembled on the base structure. The first terminals are disposed on the mount assembly. The second terminal is disposed on the base structure. The cover is disposed on the base structure and covers at least part of the first terminals and at least part of the second terminal.

Abstract: A chip package including a heat-dissipating device, a first thermal interface material layer disposed on the heat-dissipating device, a patterned circuit layer disposed on the first thermal interface material layer, a chip disposed on the patterned circuit layer and electrically connected to the patterned circuit layer, and an insulating encapsulant covering the chip, the patterned circuit layer, and the first thermal interface material layer is provided. The first thermal interface material layer has a thickness between 100 ?m and 300 ?m. The first thermal interface material layer is located between the patterned circuit layer and the heat-dissipating device.

Abstract: An integrated antenna package structure includes a first redistribution structure, a first chip, a heat dissipation structure, a second chip, and an antenna structure. The first chip is located on a first side of the first redistribution structure, and is electrically connected to the first redistribution structure. The heat dissipation structure is thermally connected to the first chip, and the first chip is located between the heat dissipation structure and the first redistribution structure. The second chip is located on a second side of the first redistribution structure opposite to the first side, and is electrically connected to the first redistribution structure. The antenna structure is electrically connected to the first redistribution structure.

Abstract: A chip package including a heat-dissipating device, a first thermal interface material layer disposed on the heat-dissipating device, a patterned circuit layer disposed on the first thermal interface material layer, a chip disposed on the patterned circuit layer and electrically connected to the patterned circuit layer, and an insulating encapsulant covering the chip, the patterned circuit layer, and the first thermal interface material layer is provided. The first thermal interface material layer has a thickness between 100 ?m and 300 ?m. The first thermal interface material layer is located between the patterned circuit layer and the heat-dissipating device.

Abstract: A chip package including a lead frame, a first chip, a heat dissipation structure, and an insulating encapsulant is provided. The lead frame includes a chip pad having a first surface and a second surface opposite to the first surface and a lead connected to the chip pad. The first chip is disposed on the first surface of the chip pad and electrically connected to the lead of the lead frame and to the outside of the insulating encapsulant via the lead. The head dissipation structure is disposed on the second surface of the chip pad and includes a thermal interface material layer attached to the second surface. The insulating encapsulant encapsulates the first chip, the heat dissipation structure, and a portion of the lead frame.

Abstract: A power module including a circuit board, a chip, a first heat-conduction and insulation substrate and a second heat-conduction and insulation substrate is provided. The circuit board includes a board and a metal block embedded in the board and exposed from a first surface and a second surface of the board opposite to one another. The chip is disposed on a side of the second surface of the board corresponding to the metal block, and the chip is electrically and thermally connected to the metal block. The first heat-conduction and insulation substrate is located on a side of the first surface of the board to be disposed on the circuit board. The second heat-conduction and insulation substrate is electrically and thermally connected to the chip.

Abstract: A power module including a circuit board, a chip, a first heat-conduction and insulation substrate and a second heat-conduction and insulation substrate is provided. The circuit board includes a board and a metal block embedded in the board and exposed from a first surface and a second surface of the board opposite to one another. The chip is disposed on a side of the second surface of the board corresponding to the metal block, and the chip is electrically and thermally connected to the metal block. The first heat-conduction and insulation substrate is located on a side of the first surface of the board to be disposed on the circuit board. The second heat-conduction and insulation substrate is electrically and thermally connected to the chip.

Abstract: A chip package including a lead frame, a first chip, a heat dissipation structure, and an insulating encapsulant is provided. The lead frame includes a chip pad having a first surface and a second surface opposite to the first surface and a lead connected to the chip pad. The first chip is disposed on the first surface of the chip pad and electrically connected to the lead of the lead frame and to the outside of the insulating encapsulant via the lead. The head dissipation structure is disposed on the second surface of the chip pad and includes a thermal interface material layer attached to the second surface. The insulating encapsulant encapsulates the first chip, the heat dissipation structure, and a portion of the lead frame.

Abstract: A chip package including a lead frame, a first chip, a heat dissipation structure, and an insulating encapsulant is provided. The lead frame includes a chip pad having a first surface and a second surface opposite to the first surface and a lead connected to the chip pad. The first chip is disposed on the first surface of the chip pad and electrically connected to the lead of the lead frame and to the outside of the insulating encapsulant via the lead. The head dissipation structure is disposed on the second surface of the chip pad and includes a thermal interface material layer attached to the second surface. The insulating encapsulant encapsulates the first chip, the heat dissipation structure, and a portion of the lead frame.

Abstract: A chip package including a lead frame, a first chip, a heat dissipation structure, and an insulating encapsulant is provided. The lead frame includes a chip pad having a first surface and a second surface opposite to the first surface and a lead connected to the chip pad. The first chip is disposed on the first surface of the chip pad and electrically connected to the lead of the lead frame and to the outside of the insulating encapsulant via the lead. The head dissipation structure is disposed on the second surface of the chip pad and includes a thermal interface material layer attached to the second surface. The insulating encapsulant encapsulates the first chip, the heat dissipation structure, and a portion of the lead frame.

Abstract: A structure of an ultraviolet light polarization component and a manufacturing process thereof, where a multi-layer thin film structure set is plated on a transparent falt substrate, and the multi-layer structure setis composed of a low refractive index thin film layer stacked for N times and a high refractive index thin film layer. The violet light is polarized into two polarization lights through the ultraviolet light polarization component, in which the two violet lights have a polarization ratio of larger than 10, so that the technical efficacy of realization of a small volume optical component and a large incident angle of the ultraviolet light.

Abstract: An in situ manufacturing process monitoring system of extreme smooth thin film and method thereof, comprising a coating device for coating a thin film on at least one substrate during a coating process, an ion figuring device for processing a surface polishing process on the thin film, a control device electrically coupled to the coating device and the ion figuring device respectively for controlling the coating device and the ion figuring device processing the coating process and surface polishing process by adjusting at least one device parameter of the coating device and the ion figuring device, and an in situ monitoring device electrically coupled to the control device for in situ monitoring at least one optical parameter of the thin film.

Abstract: The present invention discloses a solar cell with a nanolaminated transparent electrode and a method of manufacturing the same. The solar cell comprises a substrate, a first electrode layer deposited on the substrate, a photovoltaic layer deposited on the first electrode layer, and a second electrode layer deposited on the photovoltaic layer. Wherein, at least one of the first and second electrode layers is a nanolaminated transparent electrode prepared by using atomic layer deposition (ALD). The nanolaminated transparent electrode may serve as both of the transparent electrode and the anti-reflective layer and is able to maintain good transmittance in infrared wavelength.

Abstract: An antireflection structure is provided. The antireflection structure includes a substrate layer having a substrate refractive index; a first inorganic layer disposed on the substrate layer and having a first refractive index different from the substrate refractive index, where a thickness of the first inorganic layer is in a range of 1 to 40 nm; and a second inorganic layer disposed on the first inorganic layer and having a second refractive index different from the first refractive index.

Abstract: A novel TCO coating and its manufacturing method are disclosed. The TCO coating of the present invention consists of titanium oxide, silicon oxide and metal. The TCO coating is manufactured according to electromagnetic field simulation software basing on the Maxwell Equations. Because the manufacturing method (including steam plating and sputter plating) of the present invention may be carried out under the room temperature, base boards that are made of polymer and that can not withstand high temperatures may be used and hence base boards may have wider applications. Also, less time is needed in the production, production cost is lowered and mass-production may be achieved.

Abstract: A reflective film is provided. The reflective film includes a substrate; a middle layer disposed on the substrate and mainly having a crystallized transition metal; and a metal layer disposed on the middle layer.

Abstract: An antireflection structure is provided. The antireflection structure includes a substrate layer having a substrate refractive index; a first inorganic layer disposed on the substrate layer and having a first refractive index different from the substrate refractive index, where a thickness of the first inorganic layer is in a range of 1 to 40 nm; and a second inorganic layer disposed on the first inorganic layer and having a second refractive index different from the first refractive index.

Abstract: A manufacturing method for a far-infrared irradiating substrate is provided. The manufacturing method comprises steps of providing a substrate, providing a far-infrared irradiating material and evaporating the far-infrared irradiating material to form a thin film onto the substrate. The far-infrared irradiating substrate provided by the present invention not only has a high emission coefficient of far-infrared ray, but also do not cause a potential exposure of an ionizing radiation.