Patents by Inventor Po Min Tu

Po Min Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120273830
    Abstract: An LED chip includes a substrate, a first type semiconductor layer, a light-emitting layer, a second type semiconductor layer, a first electrode and a second electrode formed on the substrate in sequence. A surface of the first type semiconductor layer away from the substrate comprises an exposed first area and a second area covered by the light-emitting layer. The first electrode is formed on the exposed first area of the substrate. A number of recesses are defined in the second area of the surface of the first type semiconductor layer. The recesses are spaced apart from each other and arranged in sequence in a direction away from the first electrode; depths of the recesses gradually decrease following an increase of a distance between the recesses and the first electrode. The second electrode is formed on the second type semiconductor layer.
    Type: Application
    Filed: February 16, 2012
    Publication date: November 1, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: CHIA-HUNG HUANG, SHIH-CHENG HUANG, PO-MIN TU, SHUN-KUEI YANG
  • Publication number: 20120261696
    Abstract: A light emitting device (LED) epitaxial structure includes a substrate, a nitride semiconductor layer, a patterned oxide total-reflective layer, a first-type semiconductor layer, an active layer and a second-type semiconductor layer. The nitride semiconductor layer is formed on the substrate. The patterned oxide total-reflective layer is formed on the nitride semiconductor layer. An upper surface of the nitride semiconductor layer is partially exposed out from the oxide total-reflective layer. The first-type semiconductor layer is arranged on the exposed upper surface of the nitride semiconductor layer and covers the oxide total-reflective layer. The active layer is arranged on the first-type semiconductor layer. The second-type semiconductor layer is arranged on the active layer.
    Type: Application
    Filed: December 7, 2011
    Publication date: October 18, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: SHIH-CHENG HUANG, PO-MIN TU
  • Publication number: 20120256162
    Abstract: A light emitting diode includes a substrate, an N-type semiconductor layer arranged on the substrate, an active layer, and a P-type semiconductor layer. The active layer includes a first barrier layer, a second barrier layer, and a quantum well structure layer arranged between the first and second barrier layers. The quantum well structure layer includes an InN layer, a GaN layer and an InGaN layer arranged on the first barrier layer in sequence. The InN layer has an upper surface connected to the GaN layer. The upper surface is rough. The InGaN layer has a concentration of In atoms in some regions of the InGaN layer which is higher that that in other regions thereof. The P-type semiconductor layer is arranged on the second barrier layer.
    Type: Application
    Filed: April 3, 2012
    Publication date: October 11, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Chia-Hung HUANG, Po-Min TU, Shih-Cheng HUANG, Shun-Kuei YANG
  • Publication number: 20120211771
    Abstract: An LED epitaxial structure includes a substrate, a buffer layer and an epitaxial layer. The buffer layer is grown on a top surface of the substrate, and the epitaxial layer is formed on a surface of the buffer layer. The epitaxial layer has a first n-type epitaxial layer and a second n-type epitaxial layer. The first n-type epitaxial layer is formed between the buffer layer and the second n-type epitaxial layer. The first n-type epitaxial layer has a plurality of irregular holes therein.
    Type: Application
    Filed: November 20, 2011
    Publication date: August 23, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG
  • Publication number: 20120205690
    Abstract: A group III-nitride based semiconductor LED includes a sapphire substrate, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer grown sequentially on the sapphire substrate. An n-type strain lattice structure is arranged between the n-type semiconductor layer and the active layer. A lattice constant of the n-type strain lattice structure exceeds that of the active layer, and is less than that of the n-type semiconductor layer.
    Type: Application
    Filed: November 25, 2011
    Publication date: August 16, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG
  • Publication number: 20120196391
    Abstract: A method for fabricating a semiconductor lighting chip includes steps: providing a substrate with an epitaxial layer, the epitaxial layer comprising a first semiconductor layer, a second semiconductor layer and an active layer located between the first semiconductor layer and the second semiconductor layer; dipping the epitaxial layer into an electrolyte to etch surfaces of the epitaxial layer and form a number of holes on the epitaxial layer; and forming electrodes on the epitaxial layer.
    Type: Application
    Filed: September 13, 2011
    Publication date: August 2, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG, YA-WEN LIN
  • Patent number: 8232122
    Abstract: A method for fabricating an LED chip is provided. Firstly, a SiO2 pattern layer is formed on a top surface of a substrate. Then, lighting structures are grown on a portion of the top surface of substrate without the SiO2 pattern layer thereon. Thereafter, the SiO2 pattern layer is removed by wet etching to form spaces between bottoms of the lighting structures and substrate. An etching solution is used to permeate into the spaces and etch the lighting structures from the bottoms thereof, whereby the lighting structures each with a trapezoid shape is formed. Sidewalls of each of the lighting structures are inclined inwardly along a top-to-bottom direction.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: July 31, 2012
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang
  • Publication number: 20120190141
    Abstract: A method for manufacturing a polychromatic light emitting diode device, comprising steps of providing an epitaxial substrate and forming a multiple semiconductor layer on the epitaxial substrate, wherein the multiple semiconductor layer comprises an n-type semiconductor layer, a p-type semiconductor layer and an active layer. The active layer emits light of a first wavelength. Thereafter a first wavelength conversion layer is formed on the multiple semiconductor layer. The first wavelength conversion layer is made of semiconductor and absorbs a portion of the light of a first wavelength and emits light of a second wavelength, wherein the second wavelength is longer than the first wavelength.
    Type: Application
    Filed: March 30, 2012
    Publication date: July 26, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: SHIH-CHENG HUANG, PO-MIN TU, YING-CHAO YEH, WEN-YU LIN, PENG-YI WU, SHIH-HSIUNG CHAN
  • Publication number: 20120175630
    Abstract: An LED comprises an electrode layer comprising a first a second sections electrically insulated from each other; an electrically conductive layer on the second section, an electrically conductive pole protruding from the electrically conductive layer; an LED die comprising an electrically insulating substrate on the electrically conductive layer, and a P-N junction on the electrically insulating substrate, the P-N junction comprising a first electrode and a second electrode, the electrically conductive pole extending through the electrically insulating substrate to electrically connect the first electrode to the second section; a transparent electrically conducting layer on the LED die, the transparent electrically conducting layer electrically connecting the second electrode to the first section; and an electrically insulating layer between the LED die, the electrically conductive layer, and the transparent electrically conducting layer, wherein the electrically insulating layer insulates the transparent ele
    Type: Application
    Filed: November 21, 2011
    Publication date: July 12, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG, YA-WEN LIN
  • Publication number: 20120175646
    Abstract: An LED module includes a base, a circuit layer formed on the base and multiple LEDs each having an LED die connecting to the circuit layer. The circuit layer includes multiple connecting sections. Each connecting section includes a first connecting part and a second connecting part electrically insulating and spaced from each other. Each LED includes an electrode layer having a first section and a second section electrically insulated from the first section and respectively electrically connecting the first and second connecting parts of a corresponding connecting section. The LED die is electrically connected to the second section. A transparent electrically conductive layer is formed on the LED die and electrically connects the LED die to the first section of the electrode layer. An electrically insulating layer is located between the LED die and surrounding the LED die except where the transparent electrically conductive layer connects.
    Type: Application
    Filed: November 29, 2011
    Publication date: July 12, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: SHIH-CHENG HUANG, PO-MIN TU
  • Publication number: 20120175628
    Abstract: An exemplary LED includes an electrode layer, an LED die, a transparent electrically conductive layer, and an electrically insulating layer. The electrode layer includes a first section and a second section electrically insulated from the first section. The LED die is arranged on and electrically connected to the second section of the electrode layer. The transparent electrically conductive layer is formed on the LED die and electrically connects the LED die to the first section of the electrode layer. The electrically insulating layer is located between the LED die and the transparent electrically conductive layer to insulate the transparent electrically conductive layer from the second section of the electrode layer.
    Type: Application
    Filed: October 13, 2011
    Publication date: July 12, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: SHIH-CHENG HUANG, PO-MIN TU, YA-WEN LIN
  • Patent number: 8217400
    Abstract: A wavelength conversion layer is formed on a surface of a light emitting device for transforming a portion of light emitted from the light emitting device into light of a different wavelength. The transformed light is mixed with the untransformed light, and thus the light emitting device can emit light having preferred CIE coordinates.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: July 10, 2012
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih Cheng Huang, Po Min Tu, Ying Chao Yeh, Wen Yu Lin, Peng Yi Wu, Shih Hsiung Chan
  • Publication number: 20120168797
    Abstract: A method for manufacturing a light emitting diode chip, comprising steps: providing a substrate with a first patterned blocking layer formed thereon; growing a first n-type semiconductor layer on the substrate between the constituting parts of first patterned blocking layer, and stopping the growth of the first n-type semiconductor layer before the first n-type semiconductor layer completely covers the first patterned blocking layer; removing the first patterned blocking layer, whereby a plurality of first holes are formed at position where the first patterned blocking layer is originally existed; continuing the growth of the first n-type semiconductor layer until the first holes are completely covered by the first n-type semiconductor layer; and forming an active layer and a p-type current blocking layer on the first n-type semiconductor layer successively.
    Type: Application
    Filed: August 15, 2011
    Publication date: July 5, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: SHIH-CHENG HUANG, PO-MIN TU
  • Publication number: 20120171791
    Abstract: A method for fabricating an LED chip is provided. Firstly, a SiO2 pattern layer is formed on a top surface of a substrate. Then, lighting structures are grown on a portion of the top surface of substrate without the SiO2 pattern layer thereon. Thereafter, the SiO2 pattern layer is removed by wet etching to form spaces between bottoms of the lighting structures and substrate. An etching solution is used to permeate into the spaces and etch the lighting structures from the bottoms thereof, whereby the lighting structures each with a trapezoid shape is formed. Sidewalls of each of the lighting structures are inclined inwardly along a top-to-bottom direction.
    Type: Application
    Filed: August 11, 2011
    Publication date: July 5, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG
  • Publication number: 20120164764
    Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate with a first block layer dividing an upper surface of the substrate into a plurality of epitaxial regions; forming a first semiconductor layer on the epitaxial regions; forming a second block layer partly covering the first semiconductor layer; forming a lighting structure on an uncovered portion of the first semiconductor layer; removing the first and the second block layers thereby defining clearances at the bottom surfaces of the first semiconductor layer and the lighting structure; and permeating etching solution into the first and second clearances to etch the first semiconductor layer and the lighting structure, thereby to form each of the first semiconductor layer and the lighting structure with an inverted frustum-shaped structure.
    Type: Application
    Filed: August 24, 2011
    Publication date: June 28, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG, YA-WEN LIN, CHIA-HUNG HUANG, SHUN-KUEI YANG
  • Publication number: 20120164773
    Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate; forming a first etching layer on the substrate; forming a connecting layer on the first etching layer; forming a second etching layer on the connecting layer; forming a lighting structure on the second etching layer; and etching the first etching layer, the connecting layer, the second etching layer and the lighting structure, wherein an etching rate of the first etching layer and the second etching layer is lager than that of the connecting layer and the lighting structure, thereby to form the connecting layer and the lighting structure each with an inverted frustum-shaped structure.
    Type: Application
    Filed: August 24, 2011
    Publication date: June 28, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG, TZU-CHIEN HUNG, YA-WEN LIN
  • Publication number: 20120153332
    Abstract: An epitaxial structure of a light emitting diode (LED) includes a substrate, an epitaxial layer, and a light capturing microstructure. The substrate has a top surface. The epitaxial layer is grown on the top surface of the substrate and has a P-type semiconductor layer, an active layer, and an N-type semiconductor layer in sequence. The light capturing microstructure is positioned on an upper portion of the epitaxial layer which is distant from the substrate. A manufacturing method of an epitaxial structure of an LED is also disclosed. The light capturing microstructure includes at least a concave and an insulating material filled in the at least a concave.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 21, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG, YA-WEN LIN
  • Publication number: 20120156815
    Abstract: A method for fabricating an LED chip includes: providing a sapphire substrate with a SiO2 pattern layer formed on the substrate; forming a lighting structure on the sapphire substrate with the SiO2 pattern layer; forming grooves in the lighting structure to divide the lighting structure into a number of light emitting regions, the grooves extending to the sapphire substrate and revealing the SiO2 pattern layer; removing the SiO2 pattern layer and forming spaces between the lighting structure and the substrate; etching part of the light emitting regions, and then forming electrodes on the light emitting regions; and cutting the sapphire substrate along the grooves to obtain a plurality of LED chips.
    Type: Application
    Filed: August 11, 2011
    Publication date: June 21, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: SHIH-CHENG HUANG, PO-MIN TU
  • Patent number: 8202752
    Abstract: A semiconductor device fabrication method is disclosed. A buffer layer is provided and a first semiconductor layer is formed on the buffer layer. Next, a first intermediate layer is formed on the first semiconductor layer by dopant with high concentration during an epitaxial process. A second semiconductor layer is overlaid on the first intermediate layer. A semiconductor light emitting device is grown on the second semiconductor layer. The formation of the intermediate layer and the second semiconductor layer is a set of steps.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: June 19, 2012
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih Cheng Huang, Po Min Tu, Ying Chao Yeh, Wen Yu Lin, Peng Yi Wu, Shih Hsiung Chan
  • Publication number: 20120142133
    Abstract: A method for fabricating a semiconductor lighting chip includes steps of providing a substrate with an epitaxial layer thereon. The epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer successively grown on the substrate. The epitaxial layer has dislocation defects traversing the first semiconductor layer, the active layer and the second semiconductor layer. The epitaxial layer is then subjected to an etching process which remove parts of the second semiconductor layer and the active layer along the dislocation defects to form recesses recessing from the second semiconductor layer to the active layer. Thereafter a first electrode and a second electrode are formed on the first semiconductor layer and the second semiconductor layer, respectively.
    Type: Application
    Filed: August 17, 2011
    Publication date: June 7, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PO-MIN TU, SHIH-CHENG HUANG