Abstract: A dual link receiver terminates, recovers, channel aligns, and link aligns a plurality of primary link channels and a plurality of secondary link channels. The plurality of primary link channels and the plurality of secondary link channels are each received, bit recovered, synchronized, decoded, and channel aligned. Then, the plurality of primary link channels and secondary link channels are link aligned. Link alignment operations first determine a relative misalignment between the plurality of primary link channels and the plurality of secondary link channels. A primary link delay is then applied to the primary link channels and a secondary link delay is then applied to the secondary link channels. A difference between the primary link delay and the secondary link delay is based upon the misalignment between the plurality of primary link channels and the plurality of secondary link channels. An enabling circuit precludes an incorrect blanking period indication.

Abstract: A dual link receiver terminates, recovers, channel aligns, and link aligns a plurality of primary link channels and a plurality of secondary link channels. The plurality of primary link channels and the plurality of secondary link channels are each received, bit recovered. synchronized, decoded and channel aligned. Then, the plurality of primary link channels and secondary link channels are link aligned. Link alignment operations first determine a relative misalignment between the plurality of primary link channels and the plurality of secondary link channels. A primary link delay is then applied to the primary link channels and a secondary link delay is then applied to the secondary link channels. A difference between the primary link delay and the secondary link delay is based upon the misalignment between the plurality of primary link channels and the plurality of secondary link channels. An enabling circuit precludes an incorrect blanking period indication.

Abstract: A dual link receiver terminates, recovers, channel aligns, and link aligns a plurality of primary link channels and a plurality of secondary link channels. The plurality of primary link channels and the plurality of secondary link channels are each received, bit recovered, synchronized, decoded and channel aligned. Then, the plurality of primary link channels and secondary link channels are link aligned. Link alignment operations first determine a relative misalignment between the plurality of primary link channels and the plurality of secondary link channels. A primary link delay is then applied to the primary link channels and a secondary link delay is then applied to the secondary link channels. A difference between the primary link delay and the secondary link delay is based upon the misalignment between the plurality of primary link channels and the plurality of secondary link channels. An enabling circuit precludes the beginning of a blanking period from being incorrectly indicated.