Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first trench, and a second trench. The substrate has a first region and a second region. The first trench is formed in the substrate within the first region. The first trench is surrounded by a first protrusion structure having a top portion and sidewalls. The second trench is formed in the substrate within the second region. The second trench is surrounded by a second protrusion structure having a top portion and sidewalls. The second trench is deeper than the first trench. The connection portion between the top portion and the sidewalls of the second protrusion structure has a greater radius of curvature than the connection portion between the top portion and the sidewalls of the first protrusion structure.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first trench, and a second trench. The substrate has a first region and a second region. The first trench is formed in the substrate within the first region. The first trench is surrounded by a first protrusion structure having a top portion and sidewalls. The second trench is formed in the substrate within the second region. The second trench is surrounded by a second protrusion structure having a top portion and sidewalls. The second trench is deeper than the first trench. The connection portion between the top portion and the sidewalls of the second protrusion structure has a greater radius of curvature than the connection portion between the top portion and the sidewalls of the first protrusion structure.

Abstract: A method for forming an isolation structure of a semiconductor device is provided. The method includes forming a patterned dielectric structure in a first area and a second area of a substrate; forming a first isolation structure in the first area and forming a second isolation structure in the second area of the substrate; forming a cap layer over the first area and the second area of the substrate and performing an etching process to etch the cap layer of the second area completely; and performing an oxidation process on the second area to form a first oxide region over the second isolation structure and under the bottom surface of the patterned dielectric structure of the second area.

Abstract: A method for forming an isolation structure of a semiconductor device is provided. The method includes forming a patterned dielectric structure in a first area and a second area of a substrate; forming a first isolation structure in the first area and forming a second isolation structure in the second area of the substrate; forming a cap layer over the first area and the second area of the substrate and performing an etching process to etch the cap layer of the second area completely; and performing an oxidation process on the second area to form a first oxide region over the second isolation structure and under the bottom surface of the patterned dielectric structure of the second area.

Abstract: A method for forming an isolation structure of a semiconductor device is provided. The method includes forming a patterned dielectric structure in a first area and a second area of a substrate; forming a first isolation structure in the first area and forming a second isolation structure in the second area of the substrate; forming a cap layer over the first area and the second area of the substrate and performing an etching process to etch the cap layer of the second area completely; and performing an oxidation process on the second area to form a first oxide region over the second isolation structure and under the bottom surface of the patterned dielectric structure of the second area.

Abstract: A method for forming an isolation structure of a semiconductor device is provided. The method includes forming a patterned dielectric structure in a first area and a second area of a substrate; forming a first isolation structure in the first area and forming a second isolation structure in the second area of the substrate; forming a cap layer over the first area and the second area of the substrate and performing an etching process to etch the cap layer of the second area completely; and performing an oxidation process on the second area to form a first oxide region over the second isolation structure and under the bottom surface of the patterned dielectric structure of the second area.

Abstract: A semiconductor device fabricating method is described. The semiconductor device fabricating method includes providing a substrate. A first gate insulating layer and a second gate insulating layer are formed on the substrate, respectively. A gate layer is blanketly formed. A portion of the gate layer, the first gate insulating layer and the second gate insulating layer are removed to form a first gate, a remaining first gate insulating layer, a second gate and a remaining second gate insulating layer. The remaining first gate insulating layer not covered by the first gate has a first thickness, and the remaining second gate insulating layer not covered by the second gate has a second thickness, wherein a ratio between the first thickness and the second thickness is about 10 to 20. A pair of first spacers and a pair of second spacers are formed on sidewalls of the first gate and the second gate, respectively.

Abstract: A semiconductor device fabricating method is described. The semiconductor device fabricating method includes providing a substrate. A first gate insulating layer and a second gate insulating layer are formed on the substrate, respectively. A gate layer is blanketly formed. A portion of the gate layer, the first gate insulating layer and the second gate insulating layer are removed to form a first gate, a remaining first gate insulating layer, a second gate and a remaining second gate insulating layer. The remaining first gate insulating layer not covered by the first gate has a first thickness, and the remaining second gate insulating layer not covered by the second gate has a second thickness, wherein a ratio between the first thickness and the second thickness is about 10 to 20. A pair of first spacers and a pair of second spacers are formed on sidewalls of the first gate and the second gate, respectively.

Abstract: The invented establishment and execution system for enterprise activity management system comprises an enterprise activity flow planning system and an enterprise activity flow execution system.

Abstract: A method of removaling photoresistance is disclosed: first, unqualified pattern on the substrate is taken away by a plasma process under a mixture of oxygen and fluorocarbon gases. Thereafter, the polymer, which is produced by reaction between the plasma and photoresist, is removed by organic solvent (ACT690/NMP). When the plasma process is applied, the plasma process also could over-etch in the silicon-oxy-nitride layer and the polymer is entirely taken off in the plasma process. Silicon-oxy-nitride is then deposited to complement the loss part in the plasma process. After that, lithography process repeats again to form a new pattern. Finally, ADI is performed to make sure if the new pattern is in the acceptable range of the process. Next, metal layer and silicon-oxy-nitride layer are patterned by the new pattern to form the interconnect.