Abstract: A data processing device includes a base plate and an electronic module. The base plate includes N driving portions. The electronic module includes an electronic component, a tray and a recognition mechanism. The tray is configured to support the electronic component and includes N slots. The tray is disposed on the base plate, such that an i-th driving portion of the N driving portions is disposed in an i-th slot of the N slots. The recognition mechanism is disposed on the tray. The recognition mechanism includes N interfering portions and N receiving recesses. When the tray moves with respect to the base plate toward a first direction, the i-th driving portion moves within the i-th slot toward a second direction to push an i-th interfering portion of the N interfering portions to move, such that the i-th interfering portion extends into an i-th receiving recess of the N receiving recesses.

Abstract: Various embodiments of the present application are directed towards an integrated memory chip comprising a memory array with a strap-cell architecture that reduces the number of distinct strap-cell types and that reduces strap-line density. In some embodiments, the memory array is limited to three distinct types of strap cells: a source line/erase gate (SLEG) strap cell; a control gate/word line (CGWL) strap cell; and a word-line strap cell. The small number of distinct strap-cell types simplifies design of the memory array and further simplifies design of a corresponding interconnect structure. Further, in some embodiments, the three distinct strap-cell types electrically couple word lines, erase gates, and control gates to corresponding strap lines in different metallization layers of an interconnect structure. By spreading the strap lines amongst different metallization layers, strap-line density is reduced.

Abstract: A heater device with a memory unit includes a first transistor, a second transistor, a memory unit and a heater. The first terminal of the second transistor and the first terminal of the first transistor are electrically connected to each other. The memory unit is electrically connected to the second terminal of the first transistor. The heater is electrically connected to the second terminal of the second transistor.

Abstract: A control system includes a plurality of pressure sensors, each to detect a pressure in a respective dynamic gas lock (DGL) nozzle control region of a plurality of DGL nozzle control regions. Each DGL nozzle control region includes one or more DGL nozzles. The control system includes a plurality of mass flow controllers (MFCs). Each MFC of the plurality of MFCs is to control a flow velocity in a respective DGL nozzle control region of the plurality of DGL nozzle control regions. The control system includes a controller to selectively cause one or more MFCs of the plurality of MFCs to adjust flow velocities in one or more DGL nozzle control regions of the plurality of DGL nozzle control regions based on pressures detected by the plurality of pressure sensors in DGL nozzle control regions of the plurality of DGL nozzle control regions.

Abstract: A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.

Abstract: A device with lock function includes a housing, a casing and a lock mechanism. The housing has a first engaging portion. The lock mechanism includes a frame, a lock member, a first elastic member, an operating member and an unlock member. The frame has a second engaging portion. The lock member has a third engaging portion engaging with the first engaging portion to lock the casing in the housing. The unlock member has a fourth engaging portion engaging with the second engaging portion to restrain the operating member. When the unlock member is pressed, the fourth engaging portion disengages from the second engaging portion and the first elastic member drives the lock member to move toward an inside of the frame, such that the third engaging portion disengages from the first engaging portion and the lock member drives the operating member to move toward an outside of the frame.

Abstract: Various embodiments of the present application are directed towards an integrated memory chip with an enhanced device-region layout for reduced leakage current and an enlarged word-line etch process window (e.g., enhanced word-line etch resiliency). In some embodiments, the integrated memory chip comprises a substrate, a control gate, a word line, and an isolation structure. The substrate comprises a first source/drain region. The control gate and the word line are on the substrate. The word line is between and borders the first source/drain region and the control gate and is elongated along a length of the word line. The isolation structure extends into the substrate and has a first isolation-structure sidewall. The first isolation-structure sidewall extends laterally along the length of the word line and underlies the word line.

Abstract: A semiconductor pattern is provided in the present invention, including a first line extending to one end in a first direction and a second line extending in a second direction perpendicular to the first direction and adjacent to the end of the first line in the first direction, wherein the end of the first line is provided with a rounding feature, the first line has a width in the second direction, and the width is gradually increased to a maximum width toward the end and gradually converged to form the rounding feature.

Abstract: A manufacturing method of a piezoelectric vibration element includes at least the following steps. Quartz wafer is provided. A first metal material layer and a second metal material layer are fully formed on a first surface and a second surface of the quartz wafer, respectively. A first photoresist material layer and a second photoresist material layer are fully formed on the first metal material layer and the second metal material layer, respectively. Only the first photoresist material layer is performed to an exposure and development process to form a first patterned photoresist layer. A portion of the first metal material layer is removed by the first patterned photoresist layer to form a metal pattern. The first patterned photoresist layer and the second photoresist material layer are removed.

Abstract: A package structure and a manufacturing method for the same are provided. The package structure includes a circuit, a mold sealing layer, a conductive metal board, and a conductive layer. The circuit board includes a substrate and a first electronic element disposed on the substrate. The mold sealing layer is disposed on the substrate and covers the first electronic element. The mold sealing layer has a top surface, a bottom surface corresponding to the top surface, and a side surface connected between the top surface and the bottom surface. The conductive metal board is disposed on the top surface and adjacent to the first electronic element. The conductive layer is disposed on the side surface and electrically connected to the conductive metal board. The conductive metal board and the conductive layer are each an independent component.

Abstract: A package structure and a manufacturing method for the same are provided. The package structure includes a circuit, a mold sealing layer, a conductive metal board, and a conductive layer. The circuit board includes a substrate and a first electronic element disposed on the substrate. The mold sealing layer is disposed on the substrate and covers the first electronic element. The mold sealing layer has a top surface, a bottom surface corresponding to the top surface, and a side surface connected between the top surface and the bottom surface. The conductive metal board is disposed on the top surface and adjacent to the first electronic element. The conductive layer is disposed on the side surface and electrically connected to the conductive metal board. The conductive metal board and the conductive layer are each an independent component.

Abstract: The present application discloses a bending-resistant polyester film and its production method thereof. The chemical structure of the bending-resistant polyester composition comprises monomers having elastic conformation. The film made from the composition of polyester of the present invention through production processes such as melt extrusion and biaxial drawing still has excellent flexibility and optical properties.

Abstract: The present invention is a fan having rotation sensing, comprising a casing, a motor disposed within the casing, a rotation sensing unit, and a control unit, the rotation sensing unit detecting a first rotation of the casing and outputting a first sensing signal, the control unit having a controller electrically coupled to the rotation sensing unit and the motor, the controller receiving the first sensing signal according thereto to control the motor to perform a first operation mode. Through this design, an operation mode of the fan can be adjusted according to the rotation of the fan in the present invention.

Abstract: A fan brake circuit includes a semiconductor switch unit, a motor, a motor drive circuit, an isolation unit, a charging/discharging unit and a control unit. One end of the motor, the semiconductor switch unit and the control unit serves to receive an input power. When the fan is powered off, the semiconductor switch unit disconnects from the motor and the motor drive circuit receives the operation voltage provided by the charging/discharging unit and transmits the drive signal to the motor, whereby the motor forms a short-circuit to brake. By means of the design of the fan brake circuit, when the fan is powered off, the fan can quickly brake and stop and the cost is lowered.

Abstract: The present invention relates to an active brake circuit for a fan with backup power, which comprises a protection circuit, a motor driving unit, a motor, a fan controller, and at least one bypass unit. The protection circuit receives an input power source. The motor driving unit connected between the protection circuit and the motor outputs a driving signal to the motor. The fan controller connected to the motor driving unit and the protection circuit outputs a control signal to the motor driving unit. The bypass unit is between the input power source and the motor driving unit such that the bypass unit passes the input power source to the motor driving unit. When the protection circuit disconnects the input power source to the motor, the motor driving unit outputs the driving signal to the motor such that a short circuit is formed to brake the motor.

Abstract: A fan brake circuit includes a semiconductor switch unit, a motor, a motor drive circuit, an isolation unit, a charging/discharging unit and a control unit. One end of the motor, the semiconductor switch unit and the control unit serves to receive an input power. When the fan is powered off, the semiconductor switch unit disconnects from the motor and the motor drive circuit receives the operation voltage provided by the charging/discharging unit and transmits the drive signal to the motor, whereby the motor forms a short-circuit to brake. By means of the design of the fan brake circuit, when the fan is powered off, the fan can quickly brake and stop and the cost is lowered.

Abstract: A fan control system includes multiple fans and a control unit. The control unit has a controller and a storage device. The storage device stores therein a first fan activation data. According to the first fan activation data, the control unit sequentially controls multiple output pins to output multiple output signals. Each fan storage device stores therein a second fan activation data identical to the first fan activation data. According to the corresponding output signal, the fan controller compares with the second fan activation data to find out the second fan activation data matching the output signal, then the fan controller outputs a drive signal to control and activate the fan to operate.

Abstract: The present invention relates to an active brake circuit for a fan with backup power, which comprises a protection circuit, a motor driving unit, a motor, a fan controller, and at least one bypass unit. The protection circuit receives an input power source. The motor driving unit connected between the protection circuit and the motor outputs a driving signal to the motor. The fan controller connected to the motor driving unit and the protection circuit outputs a control signal to the motor driving unit. The bypass unit is between the input power source and the motor driving unit such that the bypass unit passes the input power source to the motor driving unit. When the protection circuit disconnects the input power source to the motor, the motor driving unit outputs the driving signal to the motor such that a short circuit is formed to brake the motor.

Abstract: A package structure and a manufacturing method for the same are provided. The package structure includes a circuit, a mold sealing layer, a conductive metal board, and a conductive layer. The circuit board includes a substrate and a first electronic element disposed on the substrate. The mold sealing layer is disposed on the substrate and covers the first electronic element. The mold sealing layer has a top surface, a bottom surface corresponding to the top surface, and a side surface connected between the top surface and the bottom surface. The conductive metal board is disposed on the top surface and adjacent to the first electronic element. The conductive layer is disposed on the side surface and electrically connected to the conductive metal board. The conductive metal board and the conductive layer are each an independent component.

Abstract: A fan control system includes multiple fans and a control unit. The control unit has a controller and a storage device. The storage device stores therein a first fan activation data. According to the first fan activation data, the control unit sequentially controls multiple output pins to output multiple output signals. Each fan storage device stores therein a second fan activation data identical to the first fan activation data. According to the corresponding output signal, the fan controller compares with the second fan activation data to find out the second fan activation data matching the output signal, then the fan controller outputs a drive signal to control and activate the fan to operate.