Patents by Inventor PO-SHU LAN

PO-SHU LAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11403061
    Abstract: An audio processing system and a method thereof are provided. The system includes an audio receiver and an audio processor device. The audio receiver includes an audio interface, an absolute value converter unit, a framing unit and a characteristic value detector unit. The audio interface receives an audio signal from an audio transceiver device. The absolute value converter unit takes an absolute value of the audio signal to output an absolute value audio signal. The framing unit divides the absolute value audio signal into a plurality of sub-frame signals. The characteristic value detector unit detects characteristic values of the sub-frame signals. The audio processer processes the audio signal outputted by the audio transceiver device according to the characteristic values of the sub-frame signals.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: August 2, 2022
    Assignee: C-MEDIA ELECTRONICS INC.
    Inventors: Po-Shu Lan, Chun-Hung Kuo
  • Publication number: 20210048974
    Abstract: An audio processing system and a method thereof are provided. The system includes an audio receiver and an audio processor device. The audio receiver includes an audio interface, an absolute value converter unit, a framing unit and a characteristic value detector unit. The audio interface receives an audio signal from an audio transceiver device. The absolute value converter unit takes an absolute value of the audio signal to output an absolute value audio signal. The framing unit divides the absolute value audio signal into a plurality of sub-frame signals. The characteristic value detector unit detects characteristic values of the sub-frame signals. The audio processer processes the audio signal outputted by the audio transceiver device according to the characteristic values of the sub-frame signals.
    Type: Application
    Filed: April 13, 2020
    Publication date: February 18, 2021
    Inventors: PO-SHU LAN, CHUN-HUNG KUO
  • Publication number: 20190027126
    Abstract: An active noise cancellation system for canceling noises within a predetermined bandwidth includes an analog-to-digital converter, a programmable noise-cancellation module, a first interpolation filter and a digital-to-analog converter. The analog-to-digital converter receives a first audio signal, and converts the first audio signal from an analog signal to a digital signal. The programmable noise-cancellation processes the first audio signal to generate a noise cancellation signal. The first interpolation filter receives a second audio signal and filters the second audio signal. The noise cancellation signal and the filtered second audio signal are integrated by an adder as a third audio signal, and then the digital-to-analog converter converts the third audio signal from a digital signal to an analog signal.
    Type: Application
    Filed: November 13, 2017
    Publication date: January 24, 2019
    Inventor: PO-SHU LAN
  • Patent number: 10186249
    Abstract: An active noise cancellation system for canceling noises within a predetermined bandwidth includes an analog-to-digital converter, a programmable noise-cancellation module, a first interpolation filter and a digital-to-analog converter. The analog-to-digital converter receives a first audio signal, and converts the first audio signal from an analog signal to a digital signal. The programmable noise-cancellation processes the first audio signal to generate a noise cancellation signal. The first interpolation filter receives a second audio signal and filters the second audio signal. The noise cancellation signal and the filtered second audio signal are integrated by an adder as a third audio signal, and then the digital-to-analog converter converts the third audio signal from a digital signal to an analog signal.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: January 22, 2019
    Assignee: C-MEDIA ELECTRONICS INC.
    Inventor: Po-Shu Lan
  • Patent number: 9762253
    Abstract: A reference frequency calibration module is provided. The reference frequency calibration module includes an oscillator, a frequency divider, a phase-locked loop (PLL) and a frequency-offset calibration unit. The frequency divider couples to the oscillator. The phase-locked loop couples to the frequency divider. The frequency-offset calibration unit couples to the frequency divider and the phase-locked loop. The oscillator is configured for operatively generating an oscillating signal having an oscillating frequency. The frequency divider divides the oscillating signal having the oscillating frequency by a first division parameter to generate a first clock signal having a first reference frequency. The phase-locked loop generates a second clock signal having a second reference frequency according to the first clock signal. The frequency-offset calibration unit is configured for operatively generating the first division parameter according to the second clock signal.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: September 12, 2017
    Assignee: C-MEDIA ELECTRONICS INC.
    Inventors: Chih-Ying Huang, Po-Shu Lan
  • Publication number: 20160126964
    Abstract: A reference frequency calibration module is provided. The reference frequency calibration module includes an oscillator, a frequency divider, a phase-locked loop (PLL) and a frequency-offset calibration unit. The frequency divider couples to the oscillator. The phase-locked loop couples to the frequency divider. The frequency-offset calibration unit couples to the frequency divider and the phase-locked loop. The oscillator is configured for operatively generating an oscillating signal having an oscillating frequency. The frequency divider divides the oscillating signal having the oscillating frequency by a first division parameter to generate a first clock signal having a first reference frequency. The phase-locked loop generates a second clock signal having a second reference frequency according to the first clock signal. The frequency-offset calibration unit is configured for operatively generating the first division parameter according to the second clock signal.
    Type: Application
    Filed: March 16, 2015
    Publication date: May 5, 2016
    Inventors: CHIH-YING HUANG, PO-SHU LAN