Patents by Inventor Po-Ting Lee

Po-Ting Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9923119
    Abstract: A white LED chip includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first material layer, the active layer includes a second material layer, and the second barrier layer includes a third material layer. The N-type layer is disposed over the tunneling structure. An energy gap of the second material layer is lower than an energy gap of the first material layer and an energy gap of the third material layer. Each of the first material layer, the second material layer and the third material layer is a metal oxide layer, a metal nitride layer or a metal oxynitride layer.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: March 20, 2018
    Assignee: OPTO TECH CORPORATION
    Inventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee
  • Patent number: 9786535
    Abstract: The present invention relates to a wafer transport system and a method of operating the same. The wafer transport system comprises at least one semiconductor apparatus, a track, a transfer device, a positioning device, a carrier and a cleaning device. The wafer transport system transports wafers along the at least one semiconductor apparatus via the carrier riding on the track. The transfer device transfers the wafers from the carrier to the at least one semiconductor apparatus. The positioning device identifies and controls the position of the carrier on the track. The cleaning device maintains the cleanliness of the wafers. The present invention provides advantages for improving the yield rate of a wafer, shortening the fabrication time of a wafer, and offering the flexibility and the extendibility to a wafer transport system.
    Type: Grant
    Filed: November 30, 2014
    Date of Patent: October 10, 2017
    Assignee: GUDENG PRECISION INDUSTRIAL CO., LTD.
    Inventors: Hui-Ming Pao, Cheng-Hsin Chen, Po-Ting Lee, Ming-Chien Chiu, Tien-Jui Lin
  • Publication number: 20150340260
    Abstract: The present invention relates to a wafer transport system and a method of operating the same. The wafer transport system comprises at least one semiconductor apparatus, a track, a transfer device, a positioning device, a carrier and a cleaning device. The wafer transport system transports wafers along the at least one semiconductor apparatus via the carrier riding on the track. The transfer device transfers the wafers from the carrier to the at least one semiconductor apparatus. The positioning device identifies and controls the position of the carrier on the track. The cleaning device maintains the cleanliness of the wafers. The present invention provides advantages for improving the yield rate of a wafer, shortening the fabrication time of a wafer, and offering the flexibility and the extendibility to a wafer transport system.
    Type: Application
    Filed: November 30, 2014
    Publication date: November 26, 2015
    Inventors: HUI-MING PAO, CHENG-HSIN CHEN, PO-TING LEE, MING-CHIEN CHIU, TIEN-JUI LIN
  • Publication number: 20150090999
    Abstract: A white LED is provided. The white LED includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first metal oxide layer. The active layer includes a second metal oxide layer. The second barrier layer includes a third metal oxide layer. The N-type layer is disposed over the tunneling structure. The N-type electrode and the P-type electrode are respectively contacted with the N-type layer and the P-type layer. An energy gap of the second metal oxide layer is lower than an energy gap of the first metal oxide layer and is lower than an energy gap of the third metal oxide layer.
    Type: Application
    Filed: January 2, 2014
    Publication date: April 2, 2015
    Applicant: OPTO TECH CORPORATION
    Inventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee
  • Publication number: 20150091019
    Abstract: A white LED chip includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first material layer, the active layer includes a second material layer, and the second barrier layer includes a third material layer. The N-type layer is disposed over the tunneling structure. An energy gap of the second material layer is lower than an energy gap of the first material layer and an energy gap of the third material layer. Each of the first material layer, the second material layer and the third material layer is a metal oxide layer, a metal nitride layer or a metal oxynitride layer.
    Type: Application
    Filed: September 18, 2014
    Publication date: April 2, 2015
    Inventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee
  • Patent number: 8981373
    Abstract: A white LED is provided. The white LED includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first metal oxide layer. The active layer includes a second metal oxide layer. The second barrier layer includes a third metal oxide layer. The N-type layer is disposed over the tunneling structure. The N-type electrode and the P-type electrode are respectively contacted with the N-type layer and the P-type layer. An energy gap of the second metal oxide layer is lower than an energy gap of the first metal oxide layer and is lower than an energy gap of the third metal oxide layer.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: March 17, 2015
    Assignee: Opto Tech Corporation
    Inventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee