Patents by Inventor Po-Tsung Hsieh

Po-Tsung Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230079784
    Abstract: Provided is a method for testing a perovskite precursor solution, including: taking a perovskite precursor solution containing a plurality of dispersed perovskite colloids as a sample to perform liquid analysis, thereby obtaining an analysis information; and determining whether the perovskite precursor solution is a good product based on obtained analysis information from the liquid analysis, wherein the analysis information is at least one selected from the group consisting of element content of the colloid, element distribution, colloid size, and colloid appearance, thereby a feasible and effective testing method is defined through the correlation between the perovskite precursor colloid and the perovskite.
    Type: Application
    Filed: November 17, 2021
    Publication date: March 16, 2023
    Inventors: Kuo-Wei Huang, Pei-Ting Chiu, Yung-Liang Tung, Po-Tsung Hsieh, Tai-Fu Lin
  • Patent number: 10978269
    Abstract: A sample chip for electron microscope includes a first substrate having a film layer, a buffer layer, and a body layer, a spacing layer positioned below the first substrate, and a second substrate positioned below the spacing layer. The buffer layer is positioned on the film layer and has a buffer opening corresponding to an area of the film layer, the body layer is positioned on the buffer layer and has a body opening corresponding to the buffer opening of the buffer layer to expose the area of the film layer corresponding to the buffer opening, the body layer has a thickness of 10 ?m-800 ?m, and etching properties of the film layer, the buffer layer, and the body layer are different. A specimen accommodating space is defined in the spacing layer to correspond to the area of the film layer corresponding to the buffer opening.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: April 13, 2021
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Po Tsung Hsieh, Chung Jen Chung, Shih Wen Tseng, Chiu Hua Huang, Tzu Hsin Chen, Ya Wen Tsai
  • Patent number: 10685852
    Abstract: A chip packaging device is provided, which includes a main body unit, packaging unit and an aligning unit. The main body unit includes a mounting base, holder and a rotational platform. The packaging unit includes upper and lower bonding elements, upper and lower chips and a mask; a vertical axis is at the middle of the upper and the lower bonding elements, and a horizontal axis is above the lower bonding element. The aligning unit includes an aligning detector and a first focusing detector. When the lower chip and the mask are disposed on the lower bonding element, place the liquid sample in the mask and spread a packaging adhesive over the surface thereof; then, remove the mask and use the aligning detector and the first focusing detector to detect the position of the lower chip respectively, such that the chips can be aligned and bonded with each other.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: June 16, 2020
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Po-Tsung Hsieh, Chia-Ming Yang, In-Gann Chen, Shih-Wen Tseng, Ya-Wen Tsai, Ya-Wen Chuang
  • Publication number: 20200144078
    Abstract: A chip packaging device is provided, which includes a main body unit, packaging unit and an aligning unit. The main body unit includes a mounting base, holder and a rotational platform. The packaging unit includes upper and lower bonding elements, upper and lower chips and a mask; a vertical axis is at the middle of the upper and the lower bonding elements, and a horizontal axis is above the lower bonding element. The aligning unit includes an aligning detector and a first focusing detector. When the lower chip and the mask are disposed on the lower bonding element, place the liquid sample in the mask and spread a packaging adhesive over the surface thereof; then, remove the mask and use the aligning detector and the first focusing detector to detect the position of the lower chip respectively, such that the chips can be aligned and bonded with each other.
    Type: Application
    Filed: November 26, 2018
    Publication date: May 7, 2020
    Inventors: Po-Tsung Hsieh, Chia-Ming Yang, In-Gann Chen, Shih-Wen Tseng, Ya-Wen Tsai, Ya-Wen Chuang
  • Publication number: 20190272972
    Abstract: A sample chip for electron microscope includes a first substrate having a film layer, a buffer layer, and a body layer, a spacing layer positioned below the first substrate, and a second substrate positioned below the spacing layer. The buffer layer is positioned on the film layer and has a buffer opening corresponding to an area of the film layer, the body layer is positioned on the buffer layer and has a body opening corresponding to the buffer opening of the buffer layer to expose the area of the film layer corresponding to the buffer opening, the body layer has a thickness of 10 ?m-800 ?m, and etching properties of the film layer, the buffer layer, and the body layer are different. A specimen accommodating space is defined in the spacing layer to correspond to the area of the film layer corresponding to the buffer opening.
    Type: Application
    Filed: November 27, 2018
    Publication date: September 5, 2019
    Inventors: Po Tsung Hsieh, Chung Jen Chung, Shih Wen Tseng, Chiu Hua Huang, Tzu Hsin Chen, Ya Wen Tsai
  • Publication number: 20190164720
    Abstract: A liquid sample carrier includes a first base that includes a first carrying portion having a first sample holding surface, and a second base that is connectable to the first base and that includes a second carrying portion, a support layer, and a second sample holding surface. The second carrying portion is stackable on the first carrying portion, and has a surrounding wall defining a through hole. The support layer is connected to the second carrying portion and has a window area corresponding to the through hole, and a peripheral area surrounding the window area. The second sample holding surface is connected to the support layer. A sample receiving area is formed between the first and second sample holding surfaces.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Inventors: Po-Tsung Hsieh, Chung-Jen Chung, Shih-Wen Tseng, Tzu-Ting Tsai, Chih-Chien Lin, Wen-Kuei Chuang
  • Publication number: 20150255656
    Abstract: A solar cell includes a substrate having an incident surface and a back surface, an emitter layer formed on the incident surface, an anti-reflective layer formed on the emitter layer opposite to the substrate, a passivation unit formed on the back surface of the substrate, a plurality of metallic nanoparticles capable of reflecting light and disposed in the passivation unit, a first electrode disposed on and electrically connected to the emitter layer, and a second electrode disposed on the passivation unit and electrically connected to the substrate. A solar module including the aforesaid solar cell is also disclosed.
    Type: Application
    Filed: January 21, 2015
    Publication date: September 10, 2015
    Inventors: Liang-Tang Wang, Po-Tsung Hsieh