Patents by Inventor Po Wah (Patrick) Chang

Po Wah (Patrick) Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8780590
    Abstract: A fly-back power converter has a current-estimating control loop that senses the primary output current in a transformer to control the secondary output. A primary-side control circuit switches primary current through the transformer on and off. A discharge time when a secondary current through an auxiliary winding of the transformer is flowing is generated by sampling a voltage divider on an auxiliary loop for a knee-point. A normalized duty cycle is calculated by multiplying the discharge time by a current that is proportional to the switching frequency and comparing to a sawtooth signal having the switching frequency. The peak of a primary-side voltage is sensed from the primary current loop and converted to a current and multiplied by the normalized duty cycle to generate an estimated current. An error amp compares the estimated current to a reference to adjust the oscillator frequency and peak current to control primary switching.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: July 15, 2014
    Assignee: Hong Kong Applied Science & Technology Research Institute Company, Ltd.
    Inventors: Wai Kit (Victor) So, Hing Kit Kwan, Chik Wai (David) Ng, Po Wah (Patrick) Chang
  • Publication number: 20130294118
    Abstract: A fly-back power converter has a current-estimating control loop that senses the primary output current in a transformer to control the secondary output. A primary-side control circuit switches primary current through the transformer on and off. A discharge time when a secondary current through an auxiliary winding of the transformer is flowing is generated by sampling a voltage divider on an auxiliary loop for a knee-point. A normalized duty cycle is calculated by multiplying the discharge time by a current that is proportional to the switching frequency and comparing to a sawtooth signal having the switching frequency. The peak of a primary-side voltage is sensed from the primary current loop and converted to a current and multiplied by the normalized duty cycle to generate an estimated current. An error amp compares the estimated current to a reference to adjust the oscillator frequency and peak current to control primary switching.
    Type: Application
    Filed: May 3, 2012
    Publication date: November 7, 2013
    Applicant: Hong Kong Applied Science & Technology Research Institute Company Limited
    Inventors: Wai Kit (Victor) SO, Hing Kit KWAN, Chik Wai (David) NG, Po Wah (Patrick) CHANG
  • Patent number: 8300431
    Abstract: A fly-back AC-DC power converter has a constant-current control loop that senses the primary output current in a transformer to control the secondary output without an expensive opto-isolator. A primary-side control circuit can use either a Quasi-Resonant (QR) or a Pulse-Width-Modulation (PWM) control loop to switch primary current through the transformer on and off. A feedback voltage is compared to a primary-side voltage sensed from the primary current loop to turn the switch on and off. A multiplier loop generates the feedback voltage using a multiplier. A level-shift inverter and a low-pass filter act as the multiplier by multiplying an off duty cycle of the switch by the feedback voltage to generate a filtered voltage. A high-gain error amp compares the filtered voltage to a reference voltage to generate the feedback voltage. The multiplier produces a simple relationship between the secondary current and the reference voltage, yielding simplified current control.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: October 30, 2012
    Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
    Inventors: Chik Wai (David) Ng, Hing Kit Kwan, Po Wah (Patrick) Chang, Wai Kit (Victor) So, Kwok Kuen (David) Kwong
  • Patent number: 8188798
    Abstract: A frequency dithering circuit reduces emissions that cause Electro-Magnetic Interference (EMI) by spreading the spectrum of a clock. The clock sequences a counter that drives a digital count value to a digital-to-analog converter (DAC). The DAC outputs a sawtooth wave with a wide voltage swing. A subtractor scales down the voltage swing to produce a reduced-swing sawtooth wave which is used as an upper limit voltage. Comparators trigger a set-reset latch to toggle the clock when current pumps charge and discharge a capacitor beyond voltage limits. Since the upper limit voltage is the reduced sawtooth wave from the subtractor, the amount of time to charge the capacitor varies, dithering the period of the clock. The degree of dithering can be adjusted by programming the feedback resistance in the subtractor. The subtractor reduces the sensitivity of dithering to errors in the DAC, allowing for an inexpensive, less precise DAC.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: May 29, 2012
    Assignee: Hong Kong Applied Science and Technology Research Institute Company, Ltd.
    Inventors: Chi Tak (Gerry) Leung, Chik Wai (David) Ng, Hing Kit Kwan, Wai Kit (Victor) So, Po Wah (Patrick) Chang, Wing Cheong Mak, Kwok Kuen (David) Kwong