Patents by Inventor Po Wang

Po Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250256103
    Abstract: An implant device implanted in an object body which is an animal including a human being, and being communicably connected to a controller device arranged outside of the object body, wherein the implant device detects an electrical signal as a physiological signal at a predetermined part in the object body, transmits detection information representing time variation of the electrical signal, receives, from the controller device, a stimulation instruction representing a stimulus to be applied to the object body, and applies an electrical stimulus to a predetermined part in the object body, on the basis of the stimulation instruction.
    Type: Application
    Filed: March 30, 2023
    Publication date: August 14, 2025
    Applicant: INOPASE INC.
    Inventors: Yen Po WANG, Munemasa SUGMOTO
  • Publication number: 20250246586
    Abstract: An electronic package and a manufacturing method thereof are provided, in which a wiring structure electrically connected to a photonic structure is disposed on a surface of a part of the photonic structure, an electronic component is disposed on the wiring structure to be electrically connected to the wiring structure, and an optical element is disposed on a surface of another part of the photonic structure to be electrically connected to the photonic structure. Therefore, the photonic structure and the electronic component are placed relatively vertically on opposite sides of the wiring structure, thereby effectively reducing the layout area of the wiring structure to meet the demand for miniaturization.
    Type: Application
    Filed: June 28, 2024
    Publication date: July 31, 2025
    Inventors: Ching-Chia CHEN, Wen-Jung TSAI, Ting-Yang CHOU, Chia-Cheng CHEN, Yu-Po WANG
  • Patent number: 12360966
    Abstract: In some examples there is disclosed a computer-implemented method comprising providing an upper index having derived values corresponding to unique key values contained in a columnstore used to store at least part of a database. It may then be determined whether there is a duplicate in the database of the unique key value of the data to be written by querying the upper index for the unique key value and, in response to the upper index having a duplicate derived value, identifying a lower index and a position within the lower index, wherein the lower index is associated with at least part of a column of the columnstore, and querying the lower index to determine whether a unique key value corresponding to the position matches the unique key value of the data to be written.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: July 15, 2025
    Assignee: SingleStore, Inc.
    Inventors: Huzaifa Abbasi, Evan Bergeron, Zhou Sun, Szu-Po Wang
  • Patent number: 12337126
    Abstract: The application relates to an external drive unit (7) for an implantable heart assist pump. The proposed drive unit (7) comprises a motor (35) for driving the heart assist pump, wherein the motor (35) is connectable to the heart assist pump via a transcutaneous drive shaft (3). The drive unit (7) further comprises a heat spreader (19) comprising a contact surface configured to contact and/or directly contact and/or lie flat against a skin of a patient. The contact surface is connected or connectable with the motor (35) in a thermally-conductive manner to transfer heat generated by the motor (35) to tissue of the patient.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: June 24, 2025
    Assignee: ECP ENTWICKLUNGSGESELLSCHAFT MBH
    Inventors: Joerg Schumacher, Gerd Spanier, Thorsten Siess, Maxim Daschewski, Jim-Po Wang
  • Publication number: 20250195867
    Abstract: A blood pump motor may be provided. The blood pump motor may have a rotor, and a stator disposed around at least a portion of the rotor. The rotor may have a central axis of rotation. The rotor may include a magnet having a length extending from a distal end to a proximal end. The rotor may be free of an opening extending from the distal end to the proximal end, and/or the magnet may have a distal end portion, a proximal end portion, and a rotationally symmetrical middle portion located between the distal end portion and the proximal end portion, the middle portion having a circular cross-section.
    Type: Application
    Filed: December 11, 2024
    Publication date: June 19, 2025
    Applicants: ABIOMED, Inc., Abiomed Europe GmbH
    Inventors: Frank KIRCHHOFF, Jim Po WANG
  • Patent number: 12334452
    Abstract: An electronic package is provided and includes an electronic structure and a plurality of conductive pillars embedded in a cladding layer, a circuit structure formed on the cladding layer, and a reinforcing member bonded to a side surface of the cladding layer, where a plurality of electronic elements are disposed on and electrically connected to the circuit structure, such that the electronic structure electrically bridges any two of the electronic elements via the circuit structure, so as to enhance the structural strength of the electronic package and avoid warpage by means of the design of the reinforcing member.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: June 17, 2025
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Fang-Lin Tsai
  • Publication number: 20250183239
    Abstract: An electronic package and a manufacturing method thereof are provided, in which a passive element and an interposer structure are disposed on a carrier structure, the passive element is encapsulated by an encapsulation layer, and the electronic element is disposed on and electrically connected to the passive element and the interposer structure. Therefore, by the design of the electronic element electrically connecting to the passive element, the power transmission path is shortened and the resistance is reduced, thereby achieving the effect of reducing power loss.
    Type: Application
    Filed: June 5, 2024
    Publication date: June 5, 2025
    Inventors: Yi-Min FU, Chi-Ching HO, Yu-Po WANG
  • Publication number: 20250140765
    Abstract: An electronic package and a manufacturing method thereof are provided, in which a plurality of photonic integrated circuit chips and an auxiliary electronic element are separately configured on a package module to shorten the transmission distance of the optical signal. Therefore, the signal transmission rate of a circuit structure can be increased, thereby improving the overall operating performance of the electronic package.
    Type: Application
    Filed: April 10, 2024
    Publication date: May 1, 2025
    Inventors: Yi-Min FU, Chi-Ching HO, Chao-Chiang PU, Yu-Po WANG
  • Publication number: 20250132221
    Abstract: An electronic package is provided and includes: a carrier structure, an electronic component disposed on the carrier structure, a heat dissipation structure disposed on the electronic component, a heat conductor sandwiched between the electronic component and the heat dissipation structure, a first intermetallic compound layer formed between the heat dissipation structure and the heat conductor, and a second intermetallic compound layer formed between the heat conductor and the electronic component. Therefore, stable connections can be formed between the heat dissipation structure, the heat conductor and the electronic component via the first intermetallic compound layer and the second intermetallic compound layer to improve heat dissipation effect.
    Type: Application
    Filed: June 26, 2024
    Publication date: April 24, 2025
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Dai-Fei LI, Liang-Yi HUNG, Chia-Cheng CHEN, Yu-Po WANG
  • Publication number: 20250105068
    Abstract: An electronic package and a manufacturing method thereof are provided, in which a first barrier body and a second barrier body are disposed respectively, and a heat dissipation structure is formed with a hole thereon. Thereby, gas in the heat dissipation structure can be discharged via the hole, so as to prevent the gas from remaining in a thermal conductive layer and affecting the heat dissipation effect.
    Type: Application
    Filed: July 2, 2024
    Publication date: March 27, 2025
    Inventors: Chuan-Shun LI, Pin-Jing SU, Liang-Yi HUNG, Chia-Cheng CHEN, Yu-Po WANG
  • Publication number: 20250102750
    Abstract: An electronic package and a manufacturing method thereof are provided, in which a first optoelectronic element having a first optical fiber connection portion is disposed on an electronic module, a second optoelectronic element having a second optical fiber connection portion is disposed on a first level layer of a lower carrying portion of a step-shaped carrier structure, and the electronic module is disposed on a second level layer of the step-shaped carrier structure and the second optoelectronic element having the second optical fiber connection portion, so that the electronic module is electrically connected to the second optoelectronic element having the second optical fiber connection portion. Thereby, two optoelectronic elements having optical fiber connection portions can be easily and vertically integrated, and the second optoelectronic element can be stably carried by the step-shaped carrier structure.
    Type: Application
    Filed: February 2, 2024
    Publication date: March 27, 2025
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Shuai-Lin LIU, Nai-Hao KAO, Yu-Po WANG
  • Publication number: 20250098156
    Abstract: A method for forming a semiconductor structure includes the following steps. A first trench is formed in a semiconductor substrate, and a first nitride layer is formed along a sidewall and a bottom surface of the first trench. A first oxide layer is formed over the first nitride layer to fill the first trench, and the first oxide layer is recessed from the first trench to form a first recess. A portion of the first nitride layer exposed from the first recess is etched, and a second nitride layer is formed along a sidewall and a bottom surface of the first recess. The second nitride layer includes a first portion along the bottom surface and a second portion along the sidewall. The second portion is removed, and a second oxide layer is formed over the first portion to fill the first recess.
    Type: Application
    Filed: December 3, 2024
    Publication date: March 20, 2025
    Inventors: Wei-Che CHANG, Kai JEN, Yu-Po WANG
  • Publication number: 20250087601
    Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Inventors: Chao-Chiang PU, Chi-Ching HO, Yi-Min FU, Yu-Po WANG, Po-Yuan SU
  • Patent number: 12218513
    Abstract: A power transfer device including an AC power source unit and a single power transfer element, and a power reception device including a single power reception element electrically coupled to the power transfer element and a power reception circuit outputting power are included. The power reception circuit includes a different potential field disposed at a position that is an electric field formed by the power transfer element and at which intensity of the electric field is different from intensity of an electric field formed at a position of the power reception element.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: February 4, 2025
    Assignee: THE UNIVERSITY OF TOKYO
    Inventors: Shinichi Warisawa, Yen Po Wang, Munemasa Sugimoto
  • Publication number: 20250038113
    Abstract: An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.
    Type: Application
    Filed: October 16, 2024
    Publication date: January 30, 2025
    Inventors: Chao-Chiang PU, Chi-Ching HO, Yi-Min FU, Yu-Po WANG, Shuai-Lin LIU
  • Patent number: 12199047
    Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: January 14, 2025
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Po-Yuan Su
  • Patent number: 12193221
    Abstract: A semiconductor structure includes a semiconductor substrate and an isolation structure disposed in the semiconductor substrate. The isolation structure includes a lining layer disposed along a boundary between the semiconductor substrate and the isolation structure, a first oxide fill layer disposed over the lining layer, a dielectric barrier structure surrounding the first oxide fill layer in a closed loop, and a second oxide fill layer disposed over the dielectric barrier structure and adjacent to the lining layer.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: January 7, 2025
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Wei-Che Chang, Kai Jen, Yu-Po Wang
  • Patent number: 12176291
    Abstract: An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: December 24, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Shuai-Lin Liu
  • Patent number: 12142451
    Abstract: A system for grounding a mask using a grounding component are provided. Some embodiments of the system include a grounding component comprising a base and an extension protruding from the base and comprising a conductive prong configured to contact a conductive layer of the mask. Some embodiments of the system include a plurality of conductive prongs configured to contact multiple positions of a conductive layer of the mask. Some other embodiments of the system include an extension comprising various shapes.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: November 12, 2024
    Assignee: ASML Netherlands B.V.
    Inventors: Tianming Chen, Chiyan Kuan, Yixiang Wang, Zhi Po Wang
  • Publication number: 20240371721
    Abstract: An electronic package and a manufacturing method thereof are provided, in which a heat sink with an opening is disposed on an electronic component of a carrier structure, a heat dissipation material is formed in the opening, and a heat dissipation lid is disposed on the opening to cover the heat dissipation material, such that the problem of insufficient heat dissipation due to the loss of the heat dissipation material can be prevented from occurring to the electronic component.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 7, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yi-Min FU, Chi-Ching HO, Chao-Chiang PU, Yu-Po WANG