Abstract: An outlier IC detection method includes acquiring first measured data of a first IC set, training the first measured data for establishing a training model, acquiring second measured data of a second IC set, generating predicted data of the second IC set by using the training model according to the second measured data, generating a bivariate dataset distribution of the second IC set according to the predicted data and the second measured data, acquiring a predetermined Mahalanobis distance on the bivariate dataset distribution of the second IC set, and identifying at least one outlier IC from the second IC set when at least one position of the at least one outlier IC on the bivariate dataset distribution is outside a range of the predetermined Mahalanobis distance.

Abstract: A semiconductor device includes a first diode, a second diode, a clamp circuit and a third diode. The first diode is coupled between an input/output (I/O) pad and a first voltage terminal. The second diode is coupled with the first diode, the I/O pad and a second voltage terminal. The clamp circuit is coupled between the first voltage terminal and the second voltage terminal. The second diode and the clamp circuit are configured to direct a first part of an electrostatic discharge (ESD) current flowing between the I/O pad and the first voltage terminal. The third diode, coupled to the first voltage terminal, and the second diode include a first semiconductor structure configured to direct a second part of the ESD current flowing between the I/O pad and the first voltage terminal.

Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.

Abstract: In some embodiments, a semiconductor device is provided, including a first doped region of a first conductivity type configured as a first terminal of a first diode, a second doped region of a second conductivity type configured as a second terminal of the first diode, wherein the first and second doped regions are coupled to a first voltage terminal; a first well of the first conductivity type surrounding the first and second doped regions in a layout view; a third doped region of the first conductivity type configured as a first terminal, coupled to an input/output pad, of a second diode; and a second well of the second conductivity type surrounding the third doped region in the layout view. The second and third doped regions, the first well, and the second well are configured as a first electrostatic discharge path between the I/O pad and the first voltage terminal.

Abstract: Embodiments are provided for suggesting topics in a messaging system. A set of queries is received from a chat transcript history, where the set of queries includes a set of unhandled queries, and each unhandled query comprises a query for which a bot did not identify a corresponding topic (e.g., queries that did not trigger selection of a topic by the bot). A vector representation is generated for each unhandled query in the set of unhandled queries. The vector representations for the set of unhandled queries are clustered to generate one or more clusters of vector representations, each cluster corresponding to a group of unhandled queries. A corresponding suggested topic is generated for each cluster and provided to an authoring tool that comprises one or more interactive elements to enable an author to select at least one of the suggested topics for implementation in the bot.

Abstract: A three-dimensional optoelectronic device package is disclosed. The three-dimensional optoelectronic device package comprises a first board having at least one surface on which one or more optoelectronic devices is disposed, and a second board having at least one surface on which a plurality of optoelectronic devices is disposed. A side of the second board is attached to the surface of the first board on which one or more optoelectronic devices is disposed to form an angle between the surface of the first board on which one or more optoelectronic devices is disposed and the surface of the second board on which one or more optoelectronic devices is disposed. A method for manufacturing a three-dimensional optoelectronic device package is also disclosed.

Abstract: A three-dimensional optoelectronic device package is disclosed. The three-dimensional optoelectronic device package comprises a first board having at least one surface on which a plurality of optoelectronic devices is disposed, and a second board having at least one surface on which a plurality of optoelectronic devices is disposed. A side of the second board is attached to the surface of the first board on which a plurality of optoelectronic devices is disposed to form an angle between the surface of the first board on which a plurality of optoelectronic devices is disposed and the surface of the second board on which a plurality of optoelectronic devices is disposed. A method for manufacturing a three-dimensional optoelectronic device package is also disclosed.

Abstract: A UV LED package includes a substrate having a dam, a LED die on the substrate, a lens bonded to the substrate, an extraction layer covering a light emitting surface of the LED die, and a lens sealing layer between the lens and the dam. The extraction layer can be formed to provide a precise gap G between the lens and the light emitting diode (LED). In addition, the materials for the lens and the extraction layer can be selected, and the gap G can be precisely dimensioned, to reduce refraction and reflection, to improve radiation extraction, to reduce power radiance, and to improve the efficiency of the UV LED package.

Abstract: Disclosed are a hydrogel composition, a method for manufacturing the hydrogel composition, and an enzymatically formed hydrogel composition, all of which are characterized mainly by the use of calcium peroxide as an oxygen receptor in a tyrosinase-catalyzed polymer crosslinking reaction in order for the polymer to chelate with calcium ions. The resulting hydrogel composition not only is highly biocompatible, but also has desirable mechanical properties and a high gelation speed.

Abstract: A three-dimensional optoelectronic device package is disclosed. The three-dimensional optoelectronic device package comprises a first board having at least one surface on which a plurality of optoelectronic devices is disposed, and a second board having at least one surface on which a plurality of optoelectronic devices is disposed. A side of the second board is attached to the surface of the first board on which a plurality of optoelectronic devices is disposed to form an angle between the surface of the first board on which a plurality of optoelectronic devices is disposed and the surface of the second board on which a plurality of optoelectronic devices is disposed. A method for manufacturing a three-dimensional optoelectronic device package is also disclosed.

Abstract: The present invention provides a cartilage filling system and a surgical instrument kit including the same. The cartilage filling system comprises a filling push-rod, a filling member, a filling hopper, and a filtering adapter. The filling member comprises a syringe shaped as a hollow cylinder and comprising a first end portion and a second end portion, wherein the syringe has a first inner diameter; and a grip portion provided on the syringe. The filling hopper comprises a connecting member having an outer surface penetrated by a vent hole; and a hopper member comprising a wide portion and a narrow portion and having a second inner diameter, wherein the wide portion is connected to the connecting member, the narrow portion is detachably connected to the first end portion, and the second inner diameter is gradually reduced from the wide portion to the narrow portion, at which the second inner diameter is equal to the first inner diameter.

Abstract: A UV LED package includes a substrate having a dam, a LED die on the substrate, a lens bonded to the substrate, an extraction layer covering a light emitting surface of the LED die, and a lens sealing layer between the lens and the dam. The extraction layer can be formed to provide a precise gap G between the lens and the light emitting diode (LED). In addition, the materials for the lens and the extraction layer can be selected, and the gap G can be precisely dimensioned, to reduce refraction and reflection, to improve radiation extraction, to reduce power radiance, and to improve the efficiency of the UV LED package.

Abstract: A light emitting device includes a circuitry substrate and multiple light emitting diodes (LEDs) bonded to the circuitry substrate in a spaced array. The light emitting device also includes a continuous and substantially flat wavelength conversion member covering the light emitting diodes (LEDs) configured to convert the electromagnetic radiation emitted by the light emitting diodes (LEDs) into another wavelength range. The light emitting device also includes a planarized layer configured to support the wavelength conversion member on the circuitry substrate. The light emitting device can also include a light shaper on the wavelength conversion member configured to form emitting windows for the electromagnetic radiation transmitted through the wavelength conversion member forming an output light beam having a desired emitting window size, shape, and edge and to block and minimize scattered electromagnetic radiation from the wavelength conversion layer.

Abstract: A light emitting device includes a circuitry substrate and multiple light emitting diodes (LEDs) bonded to the circuitry substrate in a spaced array. The light emitting device also includes a continuous and substantially flat wavelength conversion member covering the light emitting diodes (LEDs) configured to convert the electromagnetic radiation emitted by the light emitting diodes (LEDs) into another wavelength range. The light emitting device also includes a planarized layer configured to support the wavelength conversion member on the circuitry substrate. The light emitting device can also include a light shaper on the wavelength conversion member configured to form emitting windows for the electromagnetic radiation transmitted through the wavelength conversion member forming an output light beam having a desired emitting window size, shape, and edge and to block and minimize scattered electromagnetic radiation from the wavelength conversion layer.

Abstract: Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.

Abstract: Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.

Abstract: Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.

Abstract: A writing method for an optical disk drive includes receiving a command to write a disc; implementing an optimum power control (OPC) test for a predetermined data transfer rate to obtain a relation of a beta parameter to writing power; acquiring a writing power for the predetermined data transfer rate with a target beta parameter; calculating the energy area ratio of writing strategies for every data transfer rate; multiplying the energy area ratio by the writing power for the predetermined data transfer rate to produce the writing power for every data transfer rate; and compensating the writing power with automatic writing control.

Abstract: Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.