Abstract: The present disclosure provides an electronic device. The electronic device includes a first transceiving element, a second transceiving element disposed over the first transceiving element, and a radiating structure configured to radiate a first EM wave having a lower frequency and a second EM wave having a higher frequency. The first transceiving element and the second transceiving element are collectively configured to provide a higher gain or bandwidth for the first EM wave than for the second EM wave.

Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.

Abstract: A semiconductor heat dissipation structure includes a first semiconductor device including a first active surface and a first back surface opposite to the first active surface, a second semiconductor device including a second active surface and a second back surface opposite to the second active surface, a first heat conductive layer embedded in the first back surface of the first semiconductor device, a second heat conductive layer embedded in the second back surface of the second semiconductor device, and a third heat conductive layer disposed adjoining the first heat conductive layer and extending to the first active surface of the first semiconductor device. The first back surface of the first semiconductor device and the second back surface of the second semiconductor device are in contact with each other. At least a portion of the first heat conductive layer are in contact with the second heat conductive layer.

Abstract: A semiconductor heat dissipation structure includes a first semiconductor device including a first active surface and a first back surface opposite to the first active surface, a second semiconductor device including a second active surface and a second back surface opposite to the second active surface, a first heat conductive layer embedded in the first back surface of the first semiconductor device, a second heat conductive layer embedded in the second back surface of the second semiconductor device, and a third heat conductive layer disposed adjoining the first heat conductive layer and extending to the first active surface of the first semiconductor device. The first back surface of the first semiconductor device and the second back surface of the second semiconductor device are in contact with each other. At least a portion of the first heat conductive layer are in contact with the second heat conductive layer.

Abstract: The present disclosure relates to wafer level packages including one or more semiconductor dies and a method of manufacturing the same. A method comprises: providing a carrier having a predetermined area, disposing a semiconductor device on the predetermined area, and forming a sacrificial wall on a periphery of the predetermined area.

Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

Abstract: The present disclosure relates to wafer level packages including one or more semiconductor dies and a method of manufacturing the same. A method comprises: providing a carrier having a predetermined area, disposing a semiconductor device on the predetermined area, and forming a sacrificial wall on a periphery of the predetermined area.

Abstract: A Micro-Electro-Mechanical-System (MEMS) microphone device includes a substrate, a MEMS microphone thin film, oxide layer. The substrate has a first penetrating portion. The MEMS microphone thin film is above the substrate and covered the first penetrating portion defining a first cavity. The MEMS microphone thin film includes an elastic portion and a connection portion. The elastic portion has a plurality of first slots arranged along the edge of the elastic portion and sequentially and separately. The first slots are penetrated two surface of the elastic portion, the surface are opposite each other. The connection portion is connected to the elastic portion and contacted the substrate. The oxide layer has a second penetrating portion. The oxide layer is on the MEMS microphone thin film and contacted the connection portion. A part of the MEMS microphone thin film is exposed through the second penetrating portion.

Abstract: A Micro-Electro-Mechanical-System (MEMS) microphone device includes a substrate, a MEMS microphone thin film, oxide layer. The substrate has a first penetrating portion. The MEMS microphone thin film is above the substrate and covered the first penetrating portion defining a first cavity. The MEMS microphone thin film includes an elastic portion and a connection portion. The elastic portion has a plurality of first slots arranged along the edge of the elastic portion and sequentially and separately. The first slots are penetrated two surface of the elastic portion, the surface are opposite each other. The connection portion is connected to the elastic portion and contacted the substrate. The oxide layer has a second penetrating portion. The oxide layer is on the MEMS microphone thin film and contacted the connection portion. A part of the MEMS microphone thin film is exposed through the second penetrating portion.

Abstract: A tunable chemical sensing device includes a sensing unit, a plurality of first pads, a value reading circuit and a plurality of second pads. The sensing unit has a first impedance component and a plurality of second impedance components. The first impedance component and the second impedance components respectively have a first terminal and a second terminal. The second impedance components respectively have a different impedance value. The first pads are respectively coupled to the corresponding first and second terminals. The value reading circuit has a first input terminal, a second input terminal and an output terminal. The second pads are respectively coupled to the corresponding first input terminal, second input terminal and output terminal. A coupling relationship between the first pads and the second pads is adjusted to tune an impedance value of the sensing unit.

Abstract: A microelectromechanical system (MEMS) gas sensing device includes a substrate, an oxide layer, a heating unit, a thermal-conductive metal layer, a passivation layer, and a sensor layer. The substrate includes a first cavity. The oxide layer has a first surface and a second surface opposite to the first surface, is on the substrate, and covers on the first cavity. The first surface contacts the substrate. The heating unit is in the oxide layer and adjacent to the first surface of the oxide layer. The thermal-conductive metal layer is between the heating unit and the second surface of the oxide layer. The passivation layer is on the second surface of the oxide layer and includes at least one via. The sensor layer is on the passivation layer and electrically connected to the thermal-conductive metal layer through the at least one via.

Abstract: A thin film apparatus having a plurality of thin film cells is disclosed. Each thin film cell includes a crystalline layer and a surrounding layer. The crystalline layer has a shape of polygon. The surrounding layer is partially located on the crystalline layer. The crystalline layer is surrounded by the surrounding layer.

Abstract: A MEMS apparatus includes a pillar, a supporter, and a solder. The pillar has a first side and a second side opposite to the first side. The supporter supports the pillar. The supporter is adjacent to the pillar, but the supporter is not connected to the pillar. The supporter has a third side and a fourth side opposite to the third side. The supporter includes a plurality of first confined layers and a plurality of second confined layers. These first confined layers and these second confined layers are overlapped with each other. The second side and the third side are adjacent to each other. The solder is located between the second side and the third side. The solder is also located at the first side and the fourth side. The solder is utilized to combine the pillar and the supporter. The solder also isolates the pillar and the supporter.

Abstract: A thin film apparatus having a plurality of thin film cells is disclosed. Each thin film cell includes a crystalline layer and a surrounding layer. The crystalline layer has a shape of polygon. The surrounding layer is partially located on the crystalline layer. The crystalline layer is surrounded by the surrounding layer.

Abstract: A signal boosting apparatus and a method of boosting signals applied in the MEMS are disclosed. The signal boosting apparatus includes a substrate, an oxide layer, and a signal transmission layer. The substrate has a doped region. The doped region has a plurality of conductive carriers. These conductive carriers have the same polarity as an electronic signal. The oxide layer is located on the substrate, and the signal transmission layer is located on the oxide layer. The signal transmission layer can receive and boost the electronic signal.