Patents by Inventor Po-Wei SU

Po-Wei SU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961834
    Abstract: A semiconductor device includes a first diode, a second diode, a clamp circuit and a third diode. The first diode is coupled between an input/output (I/O) pad and a first voltage terminal. The second diode is coupled with the first diode, the I/O pad and a second voltage terminal. The clamp circuit is coupled between the first voltage terminal and the second voltage terminal. The second diode and the clamp circuit are configured to direct a first part of an electrostatic discharge (ESD) current flowing between the I/O pad and the first voltage terminal. The third diode, coupled to the first voltage terminal, and the second diode include a first semiconductor structure configured to direct a second part of the ESD current flowing between the I/O pad and the first voltage terminal.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Lin Peng, Li-Wei Chu, Ming-Fu Tsai, Jam-Wem Lee, Yu-Ti Su
  • Patent number: 11929363
    Abstract: In some embodiments, a semiconductor device is provided, including a first doped region of a first conductivity type configured as a first terminal of a first diode, a second doped region of a second conductivity type configured as a second terminal of the first diode, wherein the first and second doped regions are coupled to a first voltage terminal; a first well of the first conductivity type surrounding the first and second doped regions in a layout view; a third doped region of the first conductivity type configured as a first terminal, coupled to an input/output pad, of a second diode; and a second well of the second conductivity type surrounding the third doped region in the layout view. The second and third doped regions, the first well, and the second well are configured as a first electrostatic discharge path between the I/O pad and the first voltage terminal.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Lin Peng, Li-Wei Chu, Ming-Fu Tsai, Jam-Wem Lee, Yu-Ti Su
  • Patent number: 9025295
    Abstract: A protective device includes a substrate, an electrode layer, a metal structure, an outer cover and an arc extinguishing structure. The electrode layer is disposed on the substrate. The electrode layer includes at least one gap. The metal structure is disposed on the electrode layer and located above the gap, and the metal structure has a melting temperature lower than a melting temperature of the electrode layer. The outer cover is disposed on the substrate and covers the metal structure and a portion of the electrode layer. The arc extinguishing structure is disposed between the outer cover and the substrate. A protective module is further provided.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: May 5, 2015
    Assignee: Cyntec Co., Ltd.
    Inventors: Chung-Hsiung Wang, Hung-Ming Lin, Lang-Yi Chiang, Wen-Shiang Luo, Kuo-Shu Chen, Han-Yang Chung, Hui-Wen Hsu, Po-Wei Su, Hong-Ming Chen
  • Publication number: 20140133059
    Abstract: A protective device includes a substrate, an electrode layer, a metal structure, an outer cover and an arc extinguishing structure. The electrode layer is disposed on the substrate. The electrode layer includes at least one gap. The metal structure is disposed on the electrode layer and located above the gap, and the metal structure has a melting temperature lower than a melting temperature of the electrode layer. The outer cover is disposed on the substrate and covers the metal structure and a portion of the electrode layer. The arc extinguishing structure is disposed between the outer cover and the substrate. A protective module is further provided.
    Type: Application
    Filed: January 23, 2014
    Publication date: May 15, 2014
    Applicant: CYNTEC CO., LTD.
    Inventors: Chung-Hsiung WANG, Hung-Ming LIN, Lang-Yi CHIANG, Wen-Shiang LUO, Kuo-Shu CHEN, Han-Yang CHUNG, Hui-Wen HSU, Po-Wei SU, Hong-Ming CHEN