Abstract: A method of manufacturing a semiconductor device includes the following steps. A photoresist layer is formed over a material layer on a substrate. The photoresist layer has a composition including a solvent and a first photo-active compound dissolved in the solvent. The first photo-active compound is represented by the following formula (A1) or formula (A2): Zr12O8(OH)14(RCO2)18 ??Formula (A1); or Hf6O4(OH)6(RCO2)10 ??Formula (A2). R in the formula (A1) and R in the formula (A2) each include one of the following formulae (1) to (6): The photoresist layer is patterned. The material layer is etched using the photoresist layer as an etch mask.

Abstract: A method of manufacturing a semiconductor device includes the following steps. A photoresist layer is formed over a material layer on a substrate. The photoresist layer has a composition including a solvent and a first photo-active compound dissolved in the solvent. The first photo-active compound is represented by the following formula (Al) or formula (A2): Zr12O8(OH)14(RCO2)18??Formula (A1); or Hf6O4(OH)6(RCO2)10??Formula (A2). R in the formula (A1) and R in the formula (A2) each include one of the following formulae (1) to (6): The photoresist layer is patterned. The material layer is etched using the photoresist layer as an etch mask.

Abstract: An electronic device includes a host, a display, a sliding plate, and a keyboard. The host has an operating surface. The display is pivoted to the host. The sliding plate is slidably disposed in the host, where the display is mechanically coupled to the sliding plate, and the sliding plate includes a plat portion and a recess portion that are arranged side by side. The keyboard is integrated to the host. The keyboard includes a key structure, where the key structure includes a key cap and a reciprocating element, and the key cap is exposed from the operating surface of the host. The reciprocating element is disposed between the key cap and the sliding plate and has a first end connected to the key cap and a second end contacting the sliding plate. The second end is located on a sliding path of the plat portion and the recess portion.

Abstract: An electronic device includes a housing that at least partially defines an exterior surface and an internal volume. The electronic device also includes a display assembly that is at least partially disposed in the internal volume. The display assembly includes a light guide including a transparent plate and a light source positioned at an end of the transparent plate. A light-blocking component is affixed to the housing and at least partially covers a portion of the transparent plate. A translucent portion extends from the light-blocking component and overlaps the transparent plate.

Abstract: A two-dimensional semiconductor is configured for contacting two metals and includes a first semiconductor layer and a plurality of second semiconductor layers. The first semiconductor layer includes a channel region and two metal contacting regions. The two metal contacting regions are connected to two sides of the channel region, respectively. A plurality of heterojunctions having type-II band alignment are formed by the second semiconductor layers and the two metal contacting regions of the first semiconductor layer, respectively, and the heterojunctions are arranged and spaced away from each other.

Abstract: A semiconductor device includes a substrate, a bottom sublayer having a monoatomic layer thickness, disposed on the substrate, located at a bottom of the device, and extending in a horizontal direction, a metal sublayer having a monoatomic layer thickness, overlaying the bottom sublayer in the horizontal direction and electrically connected to the bottom sublayer, a top sublayer having a monoatomic layer thickness, disposed in the horizontal direction and electrically connected to the metal sublayer, and a contact metal layer disposed above the metal sublayer. A top surface of the contact metal layer is higher than a top surface of the top sublayer. Bottom layer contact metal atoms of the contact metal layer directly form corresponding bonds with a metal atom surface of the metal sublayer exposed after a portion of the top sublayer is stripped. Original corresponding bonds are maintained between the metal sublayer and the bottom sublayer.

Abstract: An electronic device includes a housing that at least partially defines an exterior surface and an internal volume. The electronic device also includes a display assembly that is at least partially disposed in the internal volume. The display assembly includes a light guide including a transparent plate and a light source positioned at an end of the transparent plate. A light-blocking component is affixed to the housing and at least partially covers a portion of the transparent plate. A translucent portion extends from the light-blocking component and overlaps the transparent plate.

Abstract: A capacitor includes a first graphene structure having a first plurality of graphene layers. The capacitor further includes a dielectric layer over the first graphene structure. The capacitor further includes a second graphene structure over the dielectric layer, wherein the second graphene structure has a second plurality of graphene layers.

Abstract: A computing device is disclosed. The computing device may include a display, a processor in communication with the display and an enclosure connected to the display. The computing device may also include an input/output (I/O) device in communication with the processor. The I/O device may also be connected to the enclosure. Additionally, the I/O device may include a modifiable display that may substantially match the appearance of the enclosure.

Abstract: A capacitor includes a first graphene structure having a first plurality of graphene layers. The capacitor further includes a dielectric layer over the first graphene structure. The capacitor further includes a second graphene structure over the dielectric layer, wherein the second graphene structure has a second plurality of graphene layers.

Abstract: An atomic layer deposition method is provided. The atomic layer deposition method includes the following steps. A substrate is placed in a reaction chamber. At least one deposition cycle is performed to deposit a metal film on the substrate. The at least one deposition cycle includes the following steps. A metal precursor is introduced in the reaction chamber. A hydrogen plasma is introduced to be reacted with the metal precursor adsorbed on the substrate to form the metal film. An annealing process is performed on the metal film. The at least one deposition cycle is performed in a hydrogen atmosphere under UV light irradiation.

Abstract: A capacitor includes a first graphene structure having a first plurality of graphene layers. The capacitor further includes a dielectric layer over the first graphene structure. The capacitor further includes a second graphene structure over the dielectric layer, wherein the second graphene structure has a second plurality of graphene layers.

Abstract: An atomic layer deposition method is provided. The atomic layer deposition method includes the following steps. A substrate is placed in a reaction chamber. At least one deposition cycle is performed to deposit a metal film on the substrate. The at least one deposition cycle includes the following steps. A metal precursor is introduced in the reaction chamber. A hydrogen plasma is introduced to be reacted with the metal precursor adsorbed on the substrate to form the metal film. An annealing process is performed on the metal film. The at least one deposition cycle is performed in a hydrogen atmosphere under UV light irradiation.

Abstract: A computing device is disclosed. The computing device may include a display, a processor in communication with the display and an enclosure connected to the display. The computing device may also include an input/output (I/O) device in communication with the processor. The I/O device may also be connected to the enclosure. Additionally, the I/O device may include a modifiable display that may substantially match the appearance of the enclosure.

Abstract: A capacitor includes a first graphene structure having a first plurality of graphene layers. The capacitor further includes a dielectric layer over the first graphene structure. The capacitor further includes a second graphene structure over the dielectric layer, wherein the second graphene structure has a second plurality of graphene layers.

Abstract: A computing device is disclosed. The computing device may include a display, a processor in communication with the display and an enclosure connected to the display. The computing device may also include an input/output (I/O) device in communication with the processor. The I/O device may also be connected to the enclosure. Additionally, the I/O device may include a modifiable display that may substantially match the appearance of the enclosure.

Abstract: In some aspects, a method for manufacturing graphene applied to grow graphene layers on an insulated surface of a work piece, includes: preparing a work piece; preparing a catalyst having a gasiform transition metal element; preparing a carbon feedstock; preparing hydrogen; mixing the carbon feedstock, the hydrogen and the catalyst over the work piece, the flow rate of the catalyst is between 4 sccm and 1,200 sccm; and warming the carbon feedstock, the hydrogen and the catalyst to the temperature between 200 degrees and 1,200 degrees centigrade, and maintaining the pressure inside the chamber between 1 mTorr and 800 Torr to make the catalyst source react with the carbon feedstock and the hydrogen so as to catalyze the decomposition of carbon feedstock to generate a plurality of carbon atoms, and the plurality of carbon atoms form the graphene layers directly on the insulated substrates of the work piece.

Abstract: A capacitor includes a first graphene structure having a first plurality of graphene layers. The capacitor further includes a dielectric layer over the first graphene structure. The capacitor further includes a second graphene structure over the dielectric layer, wherein the second graphene structure has a second plurality of graphene layers.

Abstract: A computing device is disclosed. The computing device may include a display, a processor in communication with the display and an enclosure connected to the display. The computing device may also include an input/output (I/O) device in communication with the processor. The I/O device may also be connected to the enclosure. Additionally, the I/O device may include a modifiable display that may substantially match the appearance of the enclosure.

Abstract: A display may have a backlight. The display backlight may have a light guide plate. An array of light-emitting diodes may emit light into the edge of the light guide plate. The array of light-emitting diodes may be mounted to a flexible printed circuit. A layer of adhesive tape may attach the light guide plate to the flexible printed circuit. The tape layer may have upper and lower adhesive layers on a carrier film. The carrier film may be formed from a metal-coated polymer layer, a high-low dielectric stack, a metal foil, or other reflective or non-reflective structures. A stiffener may be provided to facilitate handling of the adhesive tape.