Patents by Inventor Po-Wen Hung

Po-Wen Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12176337
    Abstract: Packaged devices and methods of manufacturing the devices are described herein. The packaged devices may be fabricated using heterogeneous devices and asymmetric dual-side molding on a multi-layered redistribution layer (RDL) structure. The packaged devices may be formed with a heterogeneous three-dimensional (3D) Fan-Out System-in-Package (SiP) structure having small profiles and can be formed using a single carrier substrate.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: December 24, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Wen Wu, Po-Yao Chuang, Meng-Liang Lin, Techi Wong, Shih-Ting Hung, Po-Hao Tsai, Shin-Puu Jeng
  • Publication number: 20240387308
    Abstract: A manufacturing method of a package-on-package structure includes forming a first package structure and staking a second package structure over the first package structure. The first package structure is formed by at least the following steps. A first redistribution structure is provided. Conductive structures are formed on the first redistribution structure. A die is placed between the conductive structures. The die and the conductive structures are encapsulated by an encapsulant. The encapsulant is planarized such that an entirety of a top surface of the encapsulant is coplanar with an entirety of top surfaces of the conductive structures. A second redistribution structure is formed on the encapsulant. The second redistribution structure includes a conductive pattern layer that is in physical contact with the top surfaces of the encapsulant and the conductive structures. An entire bottom surface of the conductive pattern layer is located at a same level height.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shin-Puu Jeng, Hsien-Wen Liu, Shih-Ting Hung, Yi-Jou Lin, Tzu-Jui Fang, Po-Yao Chuang
  • Publication number: 20240332211
    Abstract: A package structure includes a redistribution structure, a first semiconductor die, a first passive component, a second semiconductor die, a first insulating encapsulant, a second insulating encapsulant, a second passive component and a global shielding structure. The redistribution structure includes dielectric layers and conductive layers alternately stacked. The first semiconductor die, the first passive component and the second semiconductor die are disposed on a first surface of the redistribution structure. The first insulating encapsulant is encapsulating the first semiconductor die and the first passive component. The second insulating encapsulant is encapsulating the second semiconductor die, wherein the second insulating encapsulant is separated from the first insulating encapsulant. The second passive component is disposed on a second surface of the redistribution structure.
    Type: Application
    Filed: June 11, 2024
    Publication date: October 3, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Wen Wu, Shin-Puu Jeng, Shih-Ting Hung, Po-Yao Chuang
  • Patent number: 12051654
    Abstract: A package structure includes a redistribution structure, a first semiconductor die, a first passive component, a second semiconductor die, a first insulating encapsulant, a second insulating encapsulant, a second passive component and a global shielding structure. The redistribution structure includes dielectric layers and conductive layers alternately stacked. The first semiconductor die, the first passive component and the second semiconductor die are disposed on a first surface of the redistribution structure. The first insulating encapsulant is encapsulating the first semiconductor die and the first passive component. The second insulating encapsulant is encapsulating the second semiconductor die, wherein the second insulating encapsulant is separated from the first insulating encapsulant. The second passive component is disposed on a second surface of the redistribution structure.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: July 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Wen Wu, Shin-Puu Jeng, Shih-Ting Hung, Po-Yao Chuang
  • Patent number: 6741474
    Abstract: An electrical device with a revolvable display panel. The electrical device comprises a housing, a guidance means, a sliding means, and a revolving means. The housing has a plurality of housing walls. One of the housing walls contains an opening. The guidance means is set inside the housing close to the opening. The sliding means is guided by the guidance means to slide into an inside position and an outside position of the housing. The revolving means has a display panel and is pivotally connected to the sliding means. When the sliding means is in the inside position, the sliding means with the display panel of the revolving means is situated inside the housing. When the sliding means slides into the outside position, the sliding means with the display panel is situated outside of the housing, thus the display panel can revolve to change an angle of the display panel.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: May 25, 2004
    Assignee: Micro-Star Int'l Co., Ltd.
    Inventors: Po-Wen Hung, Te-Ming Hsu