Patents by Inventor Po-Yi Huang
Po-Yi Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250071923Abstract: A card edge connector includes: a connector base having a card slot and plural terminals; a latch located at one end of the connector base for locking a card; and a releasing member. The releasing member includes two levers and a moving member, the levers are connected with the connector base in a pivoting manner, a first end of the lever is connected with the latch and an opposite second end of the lever is coupled to the moving member, wherein when the card is inserted into the slot and presses against the moving member downwards, the moving member drives the second ends of the levers to move downward, resulting in the first ends moving upwards to push the latch to lock with the card, and when the card is pulled out the moving member resets and drives the levers to release the latch from the card.Type: ApplicationFiled: August 19, 2024Publication date: February 27, 2025Inventors: KUO-CHUN HSU, Ming-Yi Gong, Yu-Che Huang, Wen-Lung Hsu, Po-Fu Chen, Xun Wu, Wen-Ting Yu, Chin-Chuan Wu, Wei-Chia Liao
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Publication number: 20250054775Abstract: A method includes forming a package, which includes forming a plurality of redistribution lines over a carrier, and forming a thermal dissipation block over the carrier. The plurality of redistribution lines and the thermal dissipation block are formed by common processes. The thermal dissipation block has a first metal density, and the plurality of redistribution lines have a second metal density smaller than the first metal density. The method further includes forming a metal post over the carrier, placing a device die directly over the thermal dissipation block, and encapsulating the device die and the metal post in an encapsulant. The package is then de-bonded from the carrier.Type: ApplicationFiled: October 31, 2024Publication date: February 13, 2025Inventors: Ching-Yi Lin, Yu-Hao Chen, Fong-Yuan Chang, Po-Hsiang Huang, Jyh Chwen Frank Lee, Shuo-Mao Chen
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Patent number: 12216407Abstract: A multi-spray RRC process with dynamic control to improve final yield and further reduce resist cost is disclosed. In one embodiment, a method, includes: dispensing a first layer of solvent on a semiconductor substrate while spinning at a first speed for a first time period; dispensing the solvent on the semiconductor substrate while spinning at a second speed for a second time period so as to transform the first layer to a second layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a third speed for a third time period so as to transform the second layer to a third layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a fourth speed for a fourth time period so as to transform the third layer to a fourth layer of the solvent; and dispensing a first layer of photoresist on the fourth layer of the solvent while spinning at a fifth speed for a fifth period of time.Type: GrantFiled: February 27, 2023Date of Patent: February 4, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ming-Hsuan Chuang, Po-Sheng Lu, Shou-Wen Kuo, Cheng-Yi Huang, Chia-Hung Chu
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Patent number: 12204135Abstract: A backlit-module-embedded illuminated keyswitch structure includes a baseplate, a mask film disposed below the baseplate and having a first coating configured to substantially reflect a light, a light guide sheet disposed at one side of the mask film and having a light source hole, a reflective layer disposed at one side of the light guide sheet opposite to the mask film and having an opening communicating with the light source hole, a top glue configured to connect the mask film and the light guide sheet around the light source hole, and a bottom glue configured to connect the light guide sheet and the reflective layer around the light source hole. The first coating covers the light source hole. In a stacked direction of the mask film, the light guide sheet, and the reflective layer, at least one of the top glue and the bottom glue overlaps the first coating.Type: GrantFiled: March 1, 2024Date of Patent: January 21, 2025Assignee: DARFON ELECTRONICS CORP.Inventors: Heng-Yi Huang, Hsin-Cheng Ho, Po-Yueh Chou
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Patent number: 11767504Abstract: Disclosed herein are albumin compositions having defined fatty acid profiles and methods of using the same. The albumin compositions described herein are suitable for use in cell culture methods, protein stabilization methods, amongst others. The albumin compositions described herein may improve the viability of and/or promote the growth of cells (e.g., mammalian cells) when the cells are cultured in a medium containing the albumin compositions. The albumin compositions described herein may improve the stability of a biologic when the biologic is in the presence of the albumin compositions. Further provided herein are methods of formulating albumin compositions having defined fatty acid profiles as described herein.Type: GrantFiled: August 14, 2020Date of Patent: September 26, 2023Assignee: Albcura CorporationInventors: Po-Yi Huang, Meng-Tsung Hsu, Pei-Chin Chen, Yu-Feng Liang, Chen-Yu Hsieh, Jeffy Chern
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Patent number: 11746349Abstract: Methods and compositions of altering a eukaryotic cell are described including providing to the eukaryotic cell a guide DNA sequence complementary to a target nucleic acid sequence, providing to the eukaryotic cell an Ago enzyme or a nuclease null Ago protein that interacts with the guide DNA sequence for DNA-guided gene editing and regulation of the target nucleic acid sequence in a site specific manner.Type: GrantFiled: February 7, 2017Date of Patent: September 5, 2023Assignee: President and Fellows of Harvard CollegeInventors: George M. Church, Luhan Yang, Margo R. Monroe, Po-Yi Huang
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Patent number: 11685942Abstract: A method of making a polypeptide including one or more D-amino acids is provided. The method includes combining a ribosome with protein translation factors including (1) a template encoding the polypeptide, wherein the template encoding the polypeptide includes one or more codons which have been recoded to accept a tRNA attached to a D-amino acid, (2) a plurality of L-amino acids and a plurality of corresponding tRNAs, (3) a plurality of D-amino acids and their corresponding aminoacyl tRNA synthetase or a plurality of tRNAs ligated with a D-amino acid, and (4) elongation factor P in a concentration of 2 to 20 micromolar, wherein translation of the template encoding the polypeptide occurs to produce the polypeptide including one or more D-amino acids.Type: GrantFiled: March 3, 2017Date of Patent: June 27, 2023Assignee: President and Fellows of Harvard CollegeInventors: George M. Church, Po-Yi Huang
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Publication number: 20220048976Abstract: Disclosed herein are albumin compositions having defined fatty acid profiles and methods of using the same. The albumin compositions described herein are suitable for use in cell culture methods, protein stabilization methods, amongst others. The albumin compositions described herein may improve the viability of and/or promote the growth of cells (e.g., mammalian cells) when the cells are cultured in a medium containing the albumin compositions. The albumin compositions described herein may improve the stability of a biologic when the biologic is in the presence of the albumin compositions. Further provided herein are methods of formulating albumin compositions having defined fatty acid profiles as described herein.Type: ApplicationFiled: August 14, 2020Publication date: February 17, 2022Inventors: Po-Yi Huang, Meng-Tsung Hsu, Pei-Chin Chen, Yu-Feng Liang, Chen-Yu Hsieh, Jeffy Chern
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Publication number: 20210189388Abstract: Methods and compositions of altering a eukaryotic cell are described including providing to the eukaryotic cell a guide DNA sequence complementary to a target nucleic acid sequence, providing to the eukaryotic cell an Ago enzyme or a nuclease null Ago protein that interacts with the guide DNA sequence for DNA-guided gene editing and regulation of the target nucleic acid sequence in a site specific manner.Type: ApplicationFiled: February 7, 2017Publication date: June 24, 2021Applicants: President and Fellows of Harvard College, President and Fellows of Harvard CollegeInventors: George M. Church, Luhan Yang, Margo R. Monroe, Po-Yi Huang
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Publication number: 20200283817Abstract: A method of making a polypeptide including one or more D-amino acids is provided that includes the use of elongation factor P with translational machinery.Type: ApplicationFiled: March 3, 2017Publication date: September 10, 2020Inventors: George M. Church, Po-Yi Huang
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Patent number: 9759745Abstract: In some embodiments, a probe card includes a PCB, a substrate, a pair of probes, a capacitive device and a first part. The PCB includes a pair of conductive paths through a first surface and a second surface of the PCB. The substrate includes a pair of conductive paths through a first surface and a second surface of the substrate. The conductive paths of the substrate and the corresponding conductive paths of the PCB are coupled between the first surface of the substrate and the second surface of the PCB. The probes and the corresponding conductive paths of the substrate are coupled beyond the second surface of the substrate. The capacitive device is coupled between a first conductive path and a second conductive path through the PCB, the substrate and the probes. The first part is configured beyond the second surface of the PCB, and holds the capacitive device.Type: GrantFiled: April 29, 2014Date of Patent: September 12, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yung-Hsin Kuo, Yuan-Li Lin, Po-Yi Huang
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Patent number: 9261534Abstract: Among other things, one or more techniques and/or systems are provided for shielding a signal pin. A signal pin, such as a signal pin within a probe card used to test electronic devices, such as integrated circuits, is shielded from interference signals, which are emitted from other signal pins within the probe card. Shielding the signal pin mitigates cross-talk issues and/or impendence control issues associated with signals that are carried by the signal pin. In one example, one or more shield pins are arranged with respect to the signal pin according to a shield configuration. For example, the shield configuration comprises a plane of signal pins, a substantially regular layout of signal pins, or a polygonal layout of signal pins, etc. In this way, one or more shield pins inhibit unintended interactions or effects that otherwise occur among two or more signal pins.Type: GrantFiled: July 27, 2012Date of Patent: February 16, 2016Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Yung-Hsin Kuo, Po-Yi Huang
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Publication number: 20150309074Abstract: In some embodiments, a probe card includes a PCB, a substrate, a pair of probes, a capacitive device and a first part. The PCB includes a pair of conductive paths through a first surface and a second surface of the PCB. The substrate includes a pair of conductive paths through a first surface and a second surface of the substrate. The conductive paths of the substrate and the corresponding conductive paths of the PCB are coupled between the first surface of the substrate and the second surface of the PCB. The probes and the corresponding conductive paths of the substrate are coupled beyond the second surface of the substrate. The capacitive device is coupled between a first conductive path and a second conductive path through the PCB, the substrate and the probes. The first part is configured beyond the second surface of the PCB, and holds the capacitive device.Type: ApplicationFiled: April 29, 2014Publication date: October 29, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: YUNG-HSIN KUO, YUAN-LI LIN, PO-YI HUANG
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Patent number: 9134368Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes an inductive or capacitive wireless communication structure located on a die region of the integrated circuit. This wireless communication structure is configured to wirelessly receive a test stimulus vector to test circuitry on the die region. The integrated circuit also includes a landing region having a size and location suitable to allow a conductive needle or conductive probe to come into direct physical and electrical contact with the landing region. The landing region provides a DC power supply to the circuitry on the die region while the test stimulus vector is wirelessly received.Type: GrantFiled: May 7, 2012Date of Patent: September 15, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yung-Hsin Kuo, Po-Yi Huang
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Publication number: 20140028338Abstract: Among other things, one or more techniques and/or systems are provided for shielding a signal pin. A signal pin, such as a signal pin within a probe card used to test electronic devices, such as integrated circuits, is shielded from interference signals, which are emitted from other signal pins within the probe card. Shielding the signal pin mitigates cross-talk issues and/or impendence control issues associated with signals that are carried by the signal pin. In one example, one or more shield pins are arranged with respect to the signal pin according to a shield configuration. For example, the shield configuration comprises a plane of signal pins, a substantially regular layout of signal pins, or a polygonal layout of signal pins, etc. In this way, one or more shield pins inhibit unintended interactions or effects that otherwise occur among two or more signal pins.Type: ApplicationFiled: July 27, 2012Publication date: January 30, 2014Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: Yung-Hsin Kuo, Po-Yi Huang
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Publication number: 20130293253Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes an inductive or capacitive wireless communication structure located on a die region of the integrated circuit. This wireless communication structure is configured to wirelessly receive a test stimulus vector to test circuitry on the die region. The integrated circuit also includes a landing region having a size and location suitable to allow a conductive needle or conductive probe to come into direct physical and electrical contact with the landing region. The landing region provides a DC power supply to the circuitry on the die region while the test stimulus vector is wirelessly received.Type: ApplicationFiled: May 7, 2012Publication date: November 7, 2013Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yung-Hsin Kuo, Po-Yi Huang