Patents by Inventor Po-Yi Wang

Po-Yi Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD AND SYSTEM FOR REDUCING WORK-IN-PROCESS
    Publication number: 20240385604
    Abstract: A method for improving a cycle time of a process of a product is provided. The method includes: collecting process profile data from a plurality of tool groups running the process, and calculating values of a plurality of key-performance-indicators (KPIs) of each tool group including calculating a standard deviation of an output of a stage of a bottleneck tool group of the tool groups; feeding the values of the KPIs and a work-in-progress (WIP) of each tool group into a neural network model in order to output an impact on the WIP for each KPI of each tool group by the neural network model; selecting a set of major KPIs of each tool group from the KPIs according to the impact of each tool group; and controlling the tool groups according to the impact of the set of major KPIs of each tool group in order to reduce a total WIP.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yi Wang, Chao-Ming Cheng
  • Method and system for reducing work-in-process
    Patent number: 12140937
    Abstract: A method for improving a cycle time of a process of a product is provided. The method includes: collecting process profile data from a plurality of tool groups running the process, and calculating values of a plurality of key-performance-indicators (KPIs) of each tool group including calculating a standard deviation of an output of a stage of a bottleneck tool group of the tool groups; feeding the values of the KPIs and a work-in-progress (WIP) of each tool group into a neural network model in order to output an impact on the WIP for each KPI of each tool group by the neural network model; selecting a set of major KPIs of each tool group from the KPIs according to the impact of each tool group; and controlling the tool groups according to the impact of the set of major KPIs of each tool group in order to reduce a total WIP.
    Type: Grant
    Filed: June 18, 2023
    Date of Patent: November 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yi Wang, Chao-Ming Cheng
  • METHOD, SYSTEM AND NON-TRANSITORY COMPUTER-READABLE MEDIUM FOR REDUCING WORK-IN-PROCESS
    Publication number: 20230359183
    Abstract: A method for improving a cycle time of a process of a product is provided. The method includes: collecting process profile data from a plurality of tool groups running the process, and calculating values of a plurality of key-performance-indicators (KPIs) of each tool group including calculating a standard deviation of an output of a stage of a bottleneck tool group of the tool groups; feeding the values of the KPIs and a work-in-progress (WIP) of each tool group into a neural network model in order to output an impact on the WIP for each KPI of each tool group by the neural network model; selecting a set of major KPIs of each tool group from the KPIs according to the impact of each tool group; and controlling the tool groups according to the impact of the set of major KPIs of each tool group in order to reduce a total WIP.
    Type: Application
    Filed: June 18, 2023
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yi Wang, Chao-Ming Cheng
  • Method, system and non-transitory computer-readable medium for reducing work-in-process
    Patent number: 11726462
    Abstract: A method for improving a cycle time of a process of a product is provided. The method includes: collecting process profile data from a plurality of tool groups running the process, and calculating values of a plurality of key-performance-indicators (KPIs) of each tool group including calculating a standard deviation of an output of a stage of a bottleneck tool group of the tool groups; feeding the values of the KPIs and a work-in-progress (WIP) of each tool group into a neural network model in order to output an impact on the WIP for each KPI of each tool group by the neural network model; selecting a set of major KPIs of each tool group from the KPIs according to the impact of each tool group; and controlling the tool groups according to the impact of the set of major KPIs of each tool group in order to reduce a total WIP.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: August 15, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yi Wang, Chao-Ming Cheng
  • METHOD, SYSTEM AND NON-TRANSITORY COMPUTER-READABLE MEDIUM FOR REDUCING WORK-IN-PROCESS
    Publication number: 20220326692
    Abstract: A method for improving a cycle time of a process of a product is provided. The method includes: collecting process profile data from a plurality of tool groups running the process, and calculating values of a plurality of key-performance-indicators (KPIs) of each tool group including calculating a standard deviation of an output of a stage of a bottleneck tool group of the tool groups; feeding the values of the KPIs and a work-in-progress (WIP) of each tool group into a neural network model in order to output an impact on the WIP for each KPI of each tool group by the neural network model; selecting a set of major KPIs of each tool group from the KPIs according to the impact of each tool group; and controlling the tool groups according to the impact of the set of major KPIs of each tool group in order to reduce a total WIP.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 13, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yi Wang, Chao-Ming Cheng
  • Method, system and non-transitory computer-readable medium for reducing work-in-progress
    Patent number: 11402828
    Abstract: A method for improving a cycle time of a process of a product is provided. The method includes: collecting process profile data from a plurality of tool groups running the process, and calculating values of a plurality of key-performance-indicators (KPIs) of each tool group including calculating a standard deviation of an output of a stage of a bottleneck tool group of the tool groups; feeding the values of the KPIs and a work-in-progress (WIP) of each tool group into a neural network model in order to output an impact on the WIP for each KPI of each tool group by the neural network model; selecting a set of major KPIs of each tool group from the KPIs according to the impact of each tool group; and controlling the tool groups according to the impact of the set of major KPIs of each tool group in order to reduce a total WIP.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: August 2, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yi Wang, Chao-Ming Cheng
  • METHOD, SYSTEM AND NON-TRANSITORY COMPUTER-READABLE MEDIUM FOR IMPROVING CYCLE TIME
    Publication number: 20190354089
    Abstract: A method for improving a cycle time of a process of a product is provided. The method includes: collecting process profile data from a plurality of tool groups running the process, and calculating values of a plurality of key-performance-indicators (KPIs) of each tool group including calculating a standard deviation of an output of a stage of a bottleneck tool group of the tool groups; feeding the values of the KPIs and a work-in-progress (WIP) of each tool group into a neural network model in order to output an impact on the WIP for each KPI of each tool group by the neural network model; selecting a set of major KPIs of each tool group from the KPIs according to the impact of each tool group; and controlling the tool groups according to the impact of the set of major KPIs of each tool group in order to reduce a total WIP.
    Type: Application
    Filed: May 18, 2018
    Publication date: November 21, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yi Wang, Chao-Ming Cheng