Abstract: A method for forming a high electron mobility transistor includes the steps of providing a substrate, sequentially forming a buffer layer, a channel layer, a barrier layer, and a semiconductor gate layer on the substrate, forming a metal gate layer on the semiconductor gate layer, forming an insulating layer on the barrier layer, the semiconductor gate layer, and the metal gate layer and a passivation layer on the insulating layer, forming an opening through the passivation layer and the insulating layer to expose the metal gate layer, and forming a gate electrode on the passivation layer and filling the opening.

Abstract: A semiconductor device includes a substrate, a first transistor disposed on the substrate, a second transistor in proximity to the first transistor on the substrate, at least one interlayer dielectric layer covering the first transistor and the second transistor, a first stress-inducing dummy metal pattern disposed on the at least one interlayer dielectric layer and directly above the first transistor, and a second stress-inducing dummy metal pattern disposed on the at least one interlayer dielectric layer and directly above the second transistor.

Abstract: A semiconductor device includes a substrate, a semiconductor channel layer, a semiconductor barrier layer, a gate capping layer, a dielectric layer, and a gate electrode. The semiconductor channel layer is disposed on the substrate, and the semiconductor barrier layer is disposed on the semiconductor channel layer. The gate capping layer is disposed on the semiconductor barrier layer, and the dielectric layer conformally covers the gate capping layer and surrounds the periphery of the gate capping layer. The gate electrode is disposed on the dielectric layer and covers at least one sidewall of the gate capping layer.

Abstract: The present disclosure relates to a semiconductor device including a substrate, a channel layer, a gate electrode, a first electrode, a second electrode, and a metal plate. The channel layer is disposed on the substrate, and the gate electrode is disposed on the channel layer. The first electrode and the second electrode are disposed on the channel layer, at two opposite sides of the gate electrode respectively. The metal plate is disposed over the channel layer, between the first electrode and the gate electrode. The metal plate includes a first extending portion and a second extending portion, wherein the second extending portion extends towards the substrate without contacting the channel layer, and the first extending portion extends toward and directly contacts the first electrode or the second electrode.

Abstract: A high electron mobility transistor includes a substrate, a channel layer disposed on the substrate, a barrier layer disposed on the channel layer, a gate structure, a drain structure, and a source structure disposed on the barrier layer and arranged along a first direction, a passivation layer disposed on the barrier layer and between the gate structure, the drain structure, and the source structure, and a conductive plate structure between the gate structure and the drain structure. The conductive plate structure includes a plurality of protruding portions extending into the passivation layer and the barrier layer and arranged along the first direction, and a base portion on the passivation layer and the protruding portions.

Abstract: A manufacturing method of a semiconductor device includes the following steps. A singulation process is performed to a semiconductor wafer for forming semiconductor dies and includes a first cutting step, a thinning step, and a second cutting step. The first cutting step is configured to form first openings in the semiconductor wafer by etching. A portion of the semiconductor wafer is located between each first opening and a back surface and removed by the thinning step. Each first opening penetrates through the semiconductor wafer after the thinning step. The second cutting step is configured to form second openings. Each second opening penetrates through the semiconductor wafer for separating the semiconductor dies. A semiconductor die includes two first side surfaces opposite to each other and two second side surfaces opposite to each other. A roughness of each first side surface is different from a roughness of each second side surface.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a gate dielectric layer on the barrier layer; forming a work function metal layer on the gate dielectric layer; patterning the work function metal layer and the gate dielectric layer; forming a gate electrode on the work function metal layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

Abstract: A method for forming a high electron mobility transistor includes the steps of providing a substrate, forming a channel layer, a barrier layer, and a first passivation layer sequentially on the substrate, forming a plurality of trenches through at least a portion of the first passivation layer, forming a second passivation layer on the first passivation layer and covering along sidewalls and bottom surfaces of the trenches, and forming a conductive plate structure on the second passivation layer and filling the trenches.

Abstract: The present disclosure relates to a semiconductor device and its manufacturing method, and the semiconductor device includes a substrate, a channel layer, a gate electrode, a first electrode, a second electrode, and a metal plate. The channel layer is disposed on the substrate, and the gate electrode is disposed on the channel layer. The first electrode and the second electrode are disposed on the channel layer, at two opposite sides of the gate electrode respectively. The metal plate is disposed over the channel layer, between the first electrode and the gate electrode. The metal plate includes a first extending portion and a second extending portion, wherein the second extending portion extends towards the substrate without contacting the channel layer, and the first extending portion extends toward and directly contacts the first electrode or the second electrode.

Abstract: A method of fabricating a semiconductor device includes the following steps. A substrate is provided. A semiconductor channel layer is formed on the substrate. A semiconductor barrier layer is formed on the semiconductor channel layer. An etching process is performed to expose a portion of the semiconductor channel layer. A dielectric layer is formed to cover the semiconductor barrier layer and the exposed semiconductor channel layer. A first electrode is formed after forming the dielectric layer, where the first electrode includes a body portion and a vertical extension portion, the body portion is electrically connected to the semiconductor barrier layer, and a bottom surface of the vertical extension portion is lower than a top surface of the semiconductor channel layer.

Abstract: A manufacturing method of a semiconductor device includes the following steps. A first transistor is formed on a substrate. The first transistor includes a first semiconductor channel structure and two first source/drain structures. The first semiconductor channel structure includes first horizontal portions and a first vertical portion. The first horizontal portions are stacked in a vertical direction and separated from one another. Each of the first horizontal portions is elongated in a horizontal direction. The first vertical portion is elongated in the vertical direction and connected with the first horizontal portions. The two first source/drain structures are disposed at two opposite sides of each of the first horizontal portions in the horizontal direction respectively. The two first source/drain structures are connected with the first horizontal portions. A top surface of the first vertical portion in and a top surface of one of the first horizontal portions are coplanar.

Abstract: A high electron mobility transistor includes a substrate, a buffer layer on the substrate, a channel layer on the buffer layer, a barrier layer on the channel layer, a semiconductor gate layer on the barrier layer, a metal gate layer on the semiconductor gate layer, and a gate electrode on the metal gate layer. The gate electrode includes a first portion in direct contact with the metal gate layer and having a first width, a second portion on the first portion and having a second width, and a third portion on the second portion and having a third width. The third width is larger than the second width. The second width is larger than the first width.

Abstract: An HEMT with a stair-like compound layer as a drain includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A source electrode, a gate electrode and a drain electrode are disposed on the second III-V compound layer. The gate electrode is disposed between the source electrode and the drain electrode. A first P-type III-V compound layer is disposed between the drain electrode and the second III-V compound layer. The first P-type III-V compound layer is stair-like.

Abstract: An HEMT with a stair-like compound layer as a drain includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A source electrode, a gate electrode and a drain electrode are disposed on the second III-V compound layer. The gate electrode is disposed between the source electrode and the drain electrode. A first P-type III-V compound layer is disposed between the drain electrode and the second III-V compound layer. The first P-type III-V compound layer is stair-like.

Abstract: A semiconductor structure includes a substrate, an insulating layer disposed on the substrate, an active layer disposed on the insulating layer and including a device region, and a charge trap layer in the substrate and extending between the insulating layer and the substrate and directly under the device region. The charge trap layer includes a plurality of n-type first doped regions and a plurality of p-type second doped regions alternately arranged and directly in contact with each other to form a plurality of interrupted depletion junctions.

Abstract: A method for forming a high electron mobility transistor includes the steps of forming an epitaxial stack on a substrate; forming a gate structure on the epitaxial stack, wherein the gate structure comprises a semiconductor gate layer, a metal gate layer on the semiconductor gate layer, and a spacer on a top surface of the semiconductor gate layer and a sidewall of the metal gate layer; forming a passivation layer covering the epitaxial stack and the gate structure; forming an opening through the passivation layer on the gate structure to expose a portion of the spacer; and removing the spacer through the opening to form an air gap between the sidewall of metal gate layer, the top surface of the semiconductor gate layer and a sidewall of the passivation layer.

Abstract: A method for forming a HEMT is disclosed. A substrate is provided. A buffer layer, a channel layer on the buffer layer, a barrier layer on the channel layer, and a semiconductor gate layer on the barrier layer are formed on the substrate. A metal gate layer is formed on the semiconductor gate layer. A spacer is formed on sidewalls of the metal gate layer. The semiconductor gate layer is then etched by using the spacer and the metal gate layer as an etching mask. A passivation layer is then formed to cover the barrier layer, the semiconductor gate layer and the metal gate layer. An opening is formed in the passivation layer to expose the metal gate layer. A gate electrode is formed on the passivation layer and in direct contact with the metal gate layer.

Abstract: A radio-frequency (RF) device includes a first gate structure extending along a first direction on a substrate, a spacer around the first gate structure, a first source/drain region adjacent to two sides of the first gate structure, a first body region extending along a second direction opposite to the first gate structure, and a first dielectric layer extending along the second direction between the first gate structure and the first body region. Preferably, the first gate structure includes a T-shape, the T-shape includes a vertical portion and a horizontal portion, and the first body region is opposite to the vertical portion.

Abstract: A radio-frequency (RF) device includes a gate structure extending along a first direction on a substrate, a spacer around the gate structure, a source region adjacent to one side of the gate structure, a drain region adjacent to another side of the gate structure, a first body region extending along a second direction adjacent to one side of the source region, and a first dielectric layer extending along the second direction between the first body region and the source region. Preferably, the gate structure includes a T-shape, the T-shape includes a vertical portion and a horizontal portion, and the first body region is adjacent to one side of the vertical portion.

Abstract: A semiconductor device includes a substrate, a semiconductor channel layer, a semiconductor barrier layer, and a gate electrode. The semiconductor channel layer is disposed on the substrate, and the semiconductor barrier layer is disposed on the semiconductor channel layer, where the surface of the semiconductor barrier layer includes at least one recess. The gate electrode is disposed on the semiconductor barrier layer and includes a body portion and at least one vertical extension portion overlapping the recess.