Abstract: A pulsed pressure control system includes a supply unit, a switching unit, a first path, a second path, a fluid receiving device, and a return path. The first path and the return path are different paths connected between the supply unit and the switching unit. The second path is connected between the switching unit and the fluid receiving device. During pressurization, the switching unit cuts off communication between the first and second paths to increase the volume of, and eventually pressurize, the fluid on the first path, and then the switching unit is switched on to allow communication between the first and second paths to instantaneously release the pressurized fluid to the fluid receiving device through the second path. During pressure release, the switching unit allows communication between the second and return paths to allow the fluid to flow back to the supply unit through the return path.

Abstract: A method of fabricating a semiconductor device includes forming at least one fin on a substrate, a plurality of dummy gates over the at least one fin, and a sidewall spacer on the dummy gates. Source and drain regions are epitaxially formed contacting the at least one fin and laterally adjacent the dummy gates, where forming the source and drain regions leaves a void below the source and drain regions and adjacent the dummy gates. The dummy gates are replaced with active gates, each having a gate dielectric on the sidewall spacer and a gate electrode on the gate dielectric. A patterned layer is formed exposing a selected active gate of the active gates. A first etch is performed to remove exposed portions of the gate electrode of the selected active gate. A second etch is performed, after the first etch, to remove exposed portions of a gate dielectric of the selected active gate.

Abstract: A semiconductor device includes semiconductor dies and a redistribution structure. The semiconductor dies are encapsulated in an encapsulant. The redistribution structure extends on the encapsulant and electrically connects the semiconductor dies. The redistribution structure includes dielectric layers and redistribution conductive layers alternately stacked. An outermost dielectric layer of the dielectric layers further away from the semiconductor dies is made of a first material. A first dielectric layer of the dielectric layers on which the outermost dielectric layer extends is made of a second material different from the first material. The first material includes at least one material selected from the group consisting of an epoxy resin, a phenolic resin, a polybenzooxazole, and a polyimide having a curing temperature lower than 250° C.

Abstract: A sensing amplifier circuit includes first and second P-type transistors and first and second N-type transistors. The first P-type transistor includes a gate coupled to an input node, a source and a bulk coupled to a first node, and a drain coupled to an output node. The second P-type transistor includes a gate coupled to an inverted reading-triggered signal, a source coupled to a voltage source, and a drain coupled to the first node. The first N-type transistor includes a gate coupled to the input node, a drain coupled to the output node, and a source coupled to ground. The second N-type transistor includes a gate receiving the inverted reading-triggered signal, a drain coupled to the output node, and a source coupled to the ground. The first P-type transistor includes an N-type well region that is electrically connected to the source and bulk of the first P-type transistor.

Abstract: A method for updating a bounding box or a keypoint in an object detection model is provided. The method for updating the bounding box in the object detection model is performed by a computing device and includes the followings. Inputting a video to the object detection model, wherein the video includes a plurality of previous frames and a current frame. Detecting an object in the current frame by the object detection model and outputting a current bounding box and a confidence value associated with the object. When the confidence value is less than a threshold, updating the current bounding box according to the plurality of previous frames, the current frame, and a motion vector. The motion vector is associated with one of the plurality of previous frames and the current frame.

Abstract: Disclosed are a signal transmission device and a quantum computer system for a qubit. The signal transmission device includes a transceiver circuit, a first sensing circuit board, a thermal insulation shell and a second sensing circuit board. The first sensing circuit board is coupled to the transceiver circuit. The thermal insulation shell separates a thermal insulation area. The second sensing circuit board is coupled to the qubit. The second sensing circuit board and the qubit are located in the thermal insulation area of the thermal insulation shell. The transceiver circuit is located outside the thermal insulation area of the thermal insulation shell. The first sensing circuit board and the second sensing circuit board perform mutual induction to produce energy changes, and the transceiver circuit transmits and receives a signal with the qubit through the mutual induction between the first sensing circuit board and the second sensing circuit board.

Abstract: A connection structure has an extension direction and includes a fitting part, a fixing part, and a turning part. The fitting part includes two joint surfaces. The fixing part includes a surface. The turning part is connected between the fitting part and the fixing part, and the turning part is inclined relative to the fitting part and the fixing part. One of the two joint surfaces of the fitting part faces a same direction as the surface of the fixing part. An offset distance is between one of the two joint surfaces and the surface along a direction vertical to the extension direction. Thus, the connection structure of the present disclosure can prevent two different antenna modules in the electronic device from interfering with each other.

Abstract: In the initial phase, the master device is configured to disable the connection between the junction device and the last slave device before performing the EtherCAT distributed clock synchronization procedure. After completion, the connection between the junction device and the last slave device is enabled. When a disconnection occurs in a closed loop topology, the junction device can serve to provide a redundant path for forwarding datagrams, thereby achieving cable redundancy. After the disconnection is fixed, the system time delay of each slave device calculated during the initial phase can still be applied without needing to perform again the distributed clock synchronization procedure.

Abstract: A smart dialing recommendation method, a non-transitory computer-readable medium, and a mobile device are disclosed. The smart dialing recommendation method includes: establishing a database according to a correspondence between a plurality of different time intervals in a past time range and a plurality of communication numbers by using a machine learning algorithm; obtaining a time stamp; and determining whether the time stamp has expired. When it is determined that the time stamp has not expired, according to the correspondence in the database and a current time point, a recommended number corresponding to the current time point is retrieved from the plurality of communication numbers. When it is determined that the time stamp has expired, the machine learning algorithm is performed again to update the plurality of communication numbers.

Abstract: A color filter module is provided. The color filter module is arranged on a display panel. The color filter module includes a transparent substrate and a color resist layer. The transparent substrate includes multiple sub-pixel regions arranged in an array. The color resist layer is arranged on the transparent substrate. The color resist layer includes multiple color resist units. The color resist units are respectively arranged across at least two sub-pixel regions, and the color resist units form a staggered array on the transparent substrate.

Abstract: A semiconductor device includes a first chip package, a heat dissipation structure and an adapter. The first chip package includes a semiconductor die laterally encapsulated by an insulating encapsulant, the semiconductor die has an active surface and a back surface opposite to the active surface. The heat dissipation structure is connected to the chip package. The adapter is disposed over the first chip package and electrically connected to the semiconductor die.

Abstract: A sensing amplifier circuit includes first and second P-type transistors and first and second N-type transistors. The first P-type transistor includes a gate coupled to an input node, a source and a bulk coupled to a first node, and a drain coupled to an output node. The second P-type transistor includes a gate coupled to an inverted reading-triggered signal, a source coupled to a voltage source, and a drain coupled to the first node. The first N-type transistor includes a gate coupled to the input node, a drain coupled to the output node, and a source coupled to ground. The second N-type transistor includes a gate receiving the inverted reading-triggered signal, a drain coupled to the output node, and a source coupled to the ground. The first P-type transistor includes an N-type well region that is electrically connected to the source and bulk of the first P-type transistor.

Abstract: A manufacturing method of a package structure includes: forming a first package component, where the first package component includes a first insulating encapsulation laterally covering semiconductor dies and a redistribution structure formed on the first insulating encapsulation and the semiconductor dies; coupling the first package component to a second package component; forming an underfill layer between the first and second package component, where the underfill layer extends to cover a sidewall of the first package component; forming a metallic layer on opposing surfaces of the semiconductor dies and the first insulating encapsulation by using a jig, where a window of the jig accessibly exposes the opposing surfaces of the semiconductor dies and the first insulating encapsulation, and a peripheral region of the opposing surface of the first insulating encapsulation is shielded by the jig.

Abstract: A method for manufacturing a semiconductor device includes: forming a first fin portion and a second fin portion on a semiconductor substrate, the first fin portion and the second fin portion being spaced apart from each other; and forming a first gate dielectric layer and a second gate dielectric layer on the first fin portion and the second fin portion, respectively, the first gate dielectric layer having a first thickness, the second gate dielectric layer having a second thickness different from the first thickness.

Abstract: An electronic package and a manufacturing method thereof are provided, in which a photonic integrated circuit chip and an electronic integrated circuit chip are disposed on opposite sides of an interposer respectively, and the photonic integrated circuit chip and the electronic integrated circuit chip can accomplish signal connection with each other via a plurality of conductive vias in the interposer directly, thereby reducing the power consumption and transmission delay of the signals transmitted between the circuits.

Abstract: A display device includes a display area, a pixel array, a display medium layer, and a color filter layer. The display area includes a plurality of sub-pixel regions, and each of the sub-pixel regions has a length and a width that are substantially the same. The pixel array corresponds to the display area in position. The display medium layer is located on the pixel array. The color filter layer includes a plurality of color resists. The color resists are arranged along a first direction and a second direction different from the first direction. Two adjacent color resists arranged along the first direction have different colors, two adjacent color resists arranged along the second direction have different colors, and adjacent two of the color resists are spaced apart from each other.

Abstract: A method includes: forming a mask layer on a semiconductor wafer; forming a tin droplet, including: supplying tin to a high-pressure reservoir from a low-pressure reservoir; monitoring a level of tin in the high-pressure reservoir by at least two electrodes attached to the high-pressure reservoir; in response to the level of the tin exceeding a threshold value, supplying the tin to a droplet generator from the high-pressure reservoir; forming the tin droplet by the droplet generator using the tin supplied from the high-pressure reservoir; generating light by the tin droplet; and patterning the mask layer by the light.

Abstract: Provided are a package structure and a method of forming the same. The package structure includes a bottom package having a first sidewall and a second sidewall opposite to each other; a hybrid path layer disposed on the bottom package, wherein the hybrid path layer comprises an optical path layer and an electrical path layer, and at least one optical path of the optical path layer extends from the first sidewall of the bottom package beyond a center of the bottom package; and a plurality of dies bonded onto the hybrid path layer.

Abstract: A computer vision processing system is provided. The system includes one or more target devices and a processing unit. The target devices are configured to run the executable code of an image processing pipeline. The processing unit is configured to receive a series of application programming interface (API) calls and create a raw graph accordingly, redraw the raw graph into a compilable graph by sequentially processing each node, and compile the compilable graph into the executable code of the image processing pipeline. The series of API calls includes at least one tiling API call to set at least one of the nodes and at least one of the data objects as tileable. Each tileable node corresponds to multiple parallel processing nodes in multiple branches in the compilable graph, and each tileable data object corresponds to multiple tile data objects in the branches in the compilable graph.

Abstract: A color reflective display panel including a reflective display panel and a color filter array is provided. The color filter array is disposed on the reflective display panel. The color filter array includes a plurality of pixel units. Each pixel unit includes one or more first pixels having a first color, one or more second pixels having a second color, and one or more third pixels having a third color. The ratio of the area of the third pixels to the area of the pixel unit is less than one-third.