Patents by Inventor Po Yuan

Po Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121523
    Abstract: A light-adjusting device having first regions and second regions is provided. The light-adjusting device includes pillars that form several groups of meta structures. The groups of meta structures correspond to the first regions, and from a top view, the first regions and the second regions are arranged in a checkerboard pattern.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Inventors: Kai-Hao CHANG, Chun-Yuan WANG, Shin-Hong KUO, Zong-Ru TU, Po-Hsiang WANG, Chih-Ming WANG
  • Publication number: 20240117862
    Abstract: An actuating device includes an actuator and a stationary portion. The actuator has at least one driving portion. The stationary portion is provided at an arbitrary position along the actuator such that the driving portion forms a first driving portion and a second driving portion. The first driving portion and the second driving portion can be provided with the same actuating ability or with different actuating abilities respectively by adjusting the position of the stationary portion.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 11, 2024
    Inventors: Chih CHANG, Po-Yuan LIAO
  • Publication number: 20240120639
    Abstract: A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.
    Type: Application
    Filed: August 10, 2023
    Publication date: April 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsiang Huang, Fong-Yuan Chang, Tsui-Ping Wang, Yi-Shin Chu
  • Publication number: 20240113010
    Abstract: A semiconductor device is disclosed herein. The semiconductor device includes a routing structure. The routing structure has an intermediate conductive routing layer. The intermediate conductive routing layer includes a first mesh conductive layer formed in a predetermined second region of the semiconductor device and a second mesh conductive layer formed in a predetermined first region of the semiconductor device. The first mesh conductive layer and the second mesh conductive layer are electrically isolated from each other. The intermediate conductive routing layer further includes multiple first conductive islands formed in the predetermined first region and multiple second conductive islands formed in the predetermined second region.
    Type: Application
    Filed: September 20, 2023
    Publication date: April 4, 2024
    Inventors: Po-Hsien Huang, Yu-Huei Lee, Hsin-Hung Lin, Chun-Yuan Shih, Lien-Chieh Yu
  • Publication number: 20240113071
    Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
  • Patent number: 11946559
    Abstract: A vessel pressure regulating system with a multidirectional control valve device includes: a pressure source; the multidirectional control valve device, which includes a housing, an actuation unit, and a working element, the housing having an interior space, an input port, and an output port, the input port being in communication with the pressure source, the actuation unit having a stationary portion and a driving portion, and the working element being controlled by the driving portion in order to open or close the output port; a vessel in communication with the output port; and a control unit for controlling the operation of the pressure source and of the driving portion. The vessel pressure regulating system enables a safety airbag of a vehicle or a similar device in a chair, bed, or the like to function effectively.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 2, 2024
    Assignee: KOGE MICRO TECH CO., LTD.
    Inventors: Chih Chang, Po-Yuan Liao
  • Publication number: 20240105619
    Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
  • Publication number: 20240105744
    Abstract: An image sensor includes a photoelectric conversion layer, a plurality of deep trench isolations, a first color filter, a first deflector, and a covering layer. The photoelectric conversion layer includes a first photodiode and a second photodiode. The deep trench isolations separate the first photodiode and the second photodiode, in which a pixel dimension is determined by a distance between two adjacent deep trench isolations. The first color filter is disposed on the first photodiode and the second photodiode. The first deflector is disposed on the first color filter. The covering layer covers and surrounds the first deflector. A refractive index of the covering layer is greater than a refractive index of the first deflector, and a difference value between the refractive index of the covering layer and the refractive index of the first deflector is in a range from 0.15 to 0.6.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventors: Ching-Hua LI, Chun-Yuan WANG, Zong-Ru TU, Po-Hsiang WANG
  • Patent number: 11942906
    Abstract: The present invention provides a transmitter including a mixer, a harmonic impedance adjustment circuit and an amplifier. The mixer is configured to mix a first baseband signal with a first oscillation signal to generate a first mixed signal to a first node, and to mix a second baseband signal with a second oscillation signal to generate a second mixed signal to a second node. The harmonic impedance adjustment circuit is coupled between the first node and the second node, and is configured to reduce harmonic components of the first mixed signal and the second mixed signal to generate an adjusted first mixed signal and an adjusted second mixed signal. The amplifier is coupled to the harmonic impedance adjustment circuit, and is configured to generate an amplified signal according to the adjusted first mixed signal and the adjusted second mixed signal.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ting-Yao Huang, Teng-Yuan Chang, Po-Chih Wang, Ka-Un Chan
  • Publication number: 20240096800
    Abstract: A semiconductor device includes first and second active regions extending in parallel in a substrate, a plurality of conductive patterns, each conductive pattern of the plurality of conductive patterns extending on the substrate across each of the first and second active regions, and a plurality of metal lines, each metal line of the plurality of metal lines overlying and extending across each of the first and second active regions. Each conductive pattern of the plurality of conductive patterns is electrically connected in parallel with each metal line of the plurality of metal lines.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: Fei Fan DUAN, Fong-yuan CHANG, Chi-Yu LU, Po-Hsiang HUANG, Chih-Liang CHEN
  • Publication number: 20240096856
    Abstract: A micro LED display device includes: a substrate; a plurality of micro light-emitting diodes disposed on the substrate; and a reflective layer and a black layer sequentially stacked on the substrate. The reflective layer and the black layer cover a surface of the substrate, wherein a top surface of the plurality of micro light-emitting diodes is exposed through the reflective layer and the black layer. A plurality of reflective banks and a plurality of black banks are sequentially disposed on the black layer and exposing the plurality of micro light-emitting diodes; and a color-conversion material covers the top surface of at least one of the plurality of micro light-emitting diodes. The color-conversion material is laterally disposed between the plurality of reflective banks. The reflective layer, the black layer, the plurality of reflective banks, and the plurality of black banks overlap each other in a display direction.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Loganathan MURUGAN, Sheng-Yuan SUN, Po-Wei CHIU
  • Patent number: 11935985
    Abstract: A micro light-emitting diode (LED) display panel including a substrate, a first micro LED, a first light-shielding wall, a second micro LED, and a second light-shielding wall is provided. The substrate includes a plurality of pixel regions arranged in an array. The first micro LED is disposed on one of the pixel regions of the substrate. The first light-shielding wall is disposed on the substrate and located beside the first micro LED. The second micro LED is disposed on the one of the pixel regions of the substrate and located beside the first micro LED. The second light-shielding wall is disposed on the substrate and located beside the second micro LED. A light wavelength of the first micro LED is different from a light wavelength of the second micro LED. A height of the first light-shielding wall is smaller than a height of the second light-shielding wall.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: March 19, 2024
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Sheng-Yuan Sun, Loganathan Murugan, Po-Wei Chiu
  • Patent number: 11935894
    Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fong-yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin, Jerry Chang Jui Kao, Sheng-Hsiung Chen, Chin-Chou Liu
  • Publication number: 20240086612
    Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Po-Hsiang HUANG, Fong-Yuan CHANG, Clement Hsingjen WANN, Chih-Hsin KO, Sheng-Hsiung CHEN, Li-Chun TIEN, Chia-Ming HSU
  • Patent number: 11929767
    Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: March 12, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chieh-Hsun Hsiao, Ming-Chou Wu, Wen-Chang Lee, Narayanan Baskaran, Wei-Hsin Tseng, Jenwei Ko, Po-Sen Tseng, Hsin-Hung Chen, Chih-Yuan Lin, Caiyi Wang
  • Patent number: 11923399
    Abstract: A micro light-emitting diode display panel includes a substrate, at least one light-emitting element, a reflective layer and a light-absorbing layer. The at least one light-emitting element is disposed on the substrate to define at least one pixel, and each light-emitting element includes micro light-emitting diodes. The reflective layer is disposed on the substrate and located between the micro light-emitting diodes. The reflective layer has cavities surrounding the micro light-emitting diodes, such that a thickness of a portion of the reflective layer close to any one of the micro light-emitting diodes is greater than a thickness of a portion of the reflective layer away from the corresponding micro light-emitting diode. The light-absorbing layer is at least disposed in the cavities of the reflective layer.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: March 5, 2024
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Sheng-Yuan Sun, Loganathan Murugan, Po-Wei Chiu, Yun-Li Li
  • Patent number: 11923271
    Abstract: A three dimensional Integrated Circuit (IC) Power Grid (PG) may be provided. The three dimensional IC PG may comprise a first IC die, a second IC die, an interface, and a power distribution structure. The interface may be disposed between the first IC die and the second IC die. The power distribution structure may be connected to the interface. The power distribution structure may comprise at least one Through-Silicon Vias (TSV) and a ladder structure connected to at least one TSV.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Noor E. V. Mohamed, Fong-Yuan Chang, Po-Hsiang Huang, Chin-Chou Liu
  • Patent number: 11923302
    Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
  • Publication number: 20240071865
    Abstract: Packaged semiconductor devices including high-thermal conductivity molding compounds and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution structure; a first die over and electrically coupled to the first redistribution structure; a first through via over and electrically coupled to the first redistribution structure; an insulation layer extending along the first redistribution structure, the first die, and the first through via; and an encapsulant over the insulation layer, the encapsulant surrounding portions of the first through via and the first die, the encapsulant including conductive fillers at a concentration ranging from 70% to about 95% by volume.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 29, 2024
    Inventors: Xinyu Bao, Lee-Chung Lu, Jyh Chwen Frank Lee, Fong-Yuan Chang, Sam Vaziri, Po-Hsiang Huang
  • Patent number: 11914804
    Abstract: A touch display device is provided in this disclosure. The touch display device includes a substrate, a first conductive layer, a second conductive layer, a stacked structure, an inorganic light emitting unit, and a touch sensing circuit. The first conductive layer is disposed on the substrate. The first conductive layer includes a gate electrode. The second conductive layer is disposed on the first conductive layer. The second conductive layer includes a source electrode and a drain electrode. The stacked structure is disposed on the substrate. The stacked structure includes a conductive channel and a sensing electrode. The inorganic light emitting unit is disposed on the stacked structure. The inorganic light emitting unit is electrically connected with the drain electrode via the conductive channel. The touch sensing circuit is electrically connected with the sensing electrode.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: February 27, 2024
    Assignee: InnoLux Corporation
    Inventors: Po-Yang Chen, Hsing-Yuan Hsu, Tzu-Min Yan, Chun-Hsien Lin, Kuei-Sheng Chang