Patents by Inventor Po-Yuan Huang
Po-Yuan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967591Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.Type: GrantFiled: August 6, 2021Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Hao Chen, Fong-Yuan Chang, Po-Hsiang Huang, Ching-Yi Lin, Jyh Chwen Frank Lee
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Publication number: 20240120639Abstract: A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.Type: ApplicationFiled: August 10, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Hsiang Huang, Fong-Yuan Chang, Tsui-Ping Wang, Yi-Shin Chu
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Publication number: 20240113010Abstract: A semiconductor device is disclosed herein. The semiconductor device includes a routing structure. The routing structure has an intermediate conductive routing layer. The intermediate conductive routing layer includes a first mesh conductive layer formed in a predetermined second region of the semiconductor device and a second mesh conductive layer formed in a predetermined first region of the semiconductor device. The first mesh conductive layer and the second mesh conductive layer are electrically isolated from each other. The intermediate conductive routing layer further includes multiple first conductive islands formed in the predetermined first region and multiple second conductive islands formed in the predetermined second region.Type: ApplicationFiled: September 20, 2023Publication date: April 4, 2024Inventors: Po-Hsien Huang, Yu-Huei Lee, Hsin-Hung Lin, Chun-Yuan Shih, Lien-Chieh Yu
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Publication number: 20240105619Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.Type: ApplicationFiled: November 29, 2023Publication date: March 28, 2024Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
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Patent number: 11942906Abstract: The present invention provides a transmitter including a mixer, a harmonic impedance adjustment circuit and an amplifier. The mixer is configured to mix a first baseband signal with a first oscillation signal to generate a first mixed signal to a first node, and to mix a second baseband signal with a second oscillation signal to generate a second mixed signal to a second node. The harmonic impedance adjustment circuit is coupled between the first node and the second node, and is configured to reduce harmonic components of the first mixed signal and the second mixed signal to generate an adjusted first mixed signal and an adjusted second mixed signal. The amplifier is coupled to the harmonic impedance adjustment circuit, and is configured to generate an amplified signal according to the adjusted first mixed signal and the adjusted second mixed signal.Type: GrantFiled: February 7, 2022Date of Patent: March 26, 2024Assignee: Realtek Semiconductor Corp.Inventors: Ting-Yao Huang, Teng-Yuan Chang, Po-Chih Wang, Ka-Un Chan
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Publication number: 20240096800Abstract: A semiconductor device includes first and second active regions extending in parallel in a substrate, a plurality of conductive patterns, each conductive pattern of the plurality of conductive patterns extending on the substrate across each of the first and second active regions, and a plurality of metal lines, each metal line of the plurality of metal lines overlying and extending across each of the first and second active regions. Each conductive pattern of the plurality of conductive patterns is electrically connected in parallel with each metal line of the plurality of metal lines.Type: ApplicationFiled: November 27, 2023Publication date: March 21, 2024Inventors: Fei Fan DUAN, Fong-yuan CHANG, Chi-Yu LU, Po-Hsiang HUANG, Chih-Liang CHEN
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Patent number: 11935894Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.Type: GrantFiled: November 4, 2022Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fong-yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin, Jerry Chang Jui Kao, Sheng-Hsiung Chen, Chin-Chou Liu
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Publication number: 20240086612Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.Type: ApplicationFiled: November 22, 2023Publication date: March 14, 2024Inventors: Po-Hsiang HUANG, Fong-Yuan CHANG, Clement Hsingjen WANN, Chih-Hsin KO, Sheng-Hsiung CHEN, Li-Chun TIEN, Chia-Ming HSU
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Patent number: 11923271Abstract: A three dimensional Integrated Circuit (IC) Power Grid (PG) may be provided. The three dimensional IC PG may comprise a first IC die, a second IC die, an interface, and a power distribution structure. The interface may be disposed between the first IC die and the second IC die. The power distribution structure may be connected to the interface. The power distribution structure may comprise at least one Through-Silicon Vias (TSV) and a ladder structure connected to at least one TSV.Type: GrantFiled: July 20, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Noor E. V. Mohamed, Fong-Yuan Chang, Po-Hsiang Huang, Chin-Chou Liu
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Patent number: 11923302Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.Type: GrantFiled: June 30, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
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Publication number: 20240071865Abstract: Packaged semiconductor devices including high-thermal conductivity molding compounds and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution structure; a first die over and electrically coupled to the first redistribution structure; a first through via over and electrically coupled to the first redistribution structure; an insulation layer extending along the first redistribution structure, the first die, and the first through via; and an encapsulant over the insulation layer, the encapsulant surrounding portions of the first through via and the first die, the encapsulant including conductive fillers at a concentration ranging from 70% to about 95% by volume.Type: ApplicationFiled: November 1, 2023Publication date: February 29, 2024Inventors: Xinyu Bao, Lee-Chung Lu, Jyh Chwen Frank Lee, Fong-Yuan Chang, Sam Vaziri, Po-Hsiang Huang
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Patent number: 11867920Abstract: A beam splitting and combining device includes a first prism, a second prism and a first optical film. The first prism includes a first surface, a second surface and a third surface. The second prism includes a fourth surface, a fifth surface and a sixth surface. The fifth surface and the second surface are attached to each other. The first optical film is formed between the second surface and the fifth surface by coating. A beam in a first range of wavelengths is configured to pass through the first surface, the second surface, the first optical film, the fifth surface and the sixth surface in order or in reverse order, or is configured to pass through the first surface and the third surface in order or in reverse order.Type: GrantFiled: December 22, 2021Date of Patent: January 9, 2024Assignees: SINTAI OPTICAL (SHENZHEN) CO., LTD., ASIA OPTICAL CO., INC.Inventors: Ting-Wei Liang, Po-Yuan Huang, Chih-Peng Wang
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Publication number: 20220221729Abstract: A beam splitting and combining device includes a first prism, a second prism and a first optical film. The first prism includes a first surface, a second surface and a third surface. The second prism includes a fourth surface, a fifth surface and a sixth surface. The fifth surface and the second surface are attached to each other. The first optical film is formed between the second surface and the fifth surface by coating. A beam in a first range of wavelengths is configured to pass through the first surface, the second surface, the first optical film, the fifth surface and the sixth surface in order or in reverse order, or is configured to pass through the first surface and the third surface in order or in reverse order.Type: ApplicationFiled: December 22, 2021Publication date: July 14, 2022Inventors: Ting-Wei LIANG, Po-Yuan HUANG, Chih-Peng WANG
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Patent number: 9818226Abstract: A method for optimizing occlusion occurring in an augmented reality system comprising a depth camera and a two-dimensional camera comprises the steps of: capturing, by a depth camera, a scene and an object in the scene to obtain initial depth data, and capturing, by the two-dimensional camera, the scene and the object to obtain two-dimensional image data; in-painting the initial depth data to obtain in-painted depth data; performing a depth buffer calculation according to the in-painted depth data and a virtual model to obtain an occlusion relationship between the object and the virtual model, and generating an occluded partial image according to the two-dimensional image data and the virtual model; estimating partially approximated polygon according to the occluded partial image; and generating an occluded result according to the partially approximated polygon, the two-dimensional image data and the virtual model.Type: GrantFiled: December 2, 2015Date of Patent: November 14, 2017Assignee: National Tsing Hua UniversityInventors: Chih-Hsing Chu, Po-Yuan Huang
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Patent number: 9586286Abstract: The invention provides an apparatus for fabricating a periodic micro-pattern by laser beams. The apparatus includes an ultrafast laser light source configured to generate an output laser beam. A diffraction optical element is configured to divide the output laser beam into a plurality of diffractive laser beams. A confocal system is configured to focus the plurality of diffractive laser beams on a focal point, so that the plurality of diffractive laser beams produces an interference light beam with interference phenomena. The interference light beam ablates a surface of an element to fabricate a periodic micro-pattern on the surface of the element. The confocal system includes a first lens, a second lens and a light shielding mask. The plurality of diffractive laser beams passes through the first lens, the light shielding mask and the second lens in sequence.Type: GrantFiled: September 25, 2014Date of Patent: March 7, 2017Assignee: Lextar Electronics CorporationInventors: Shih-Hsien Huang, Shih-Hao Wang, Po-Yuan Huang
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Publication number: 20160210787Abstract: A method for optimizing occlusion occurring in an augmented reality system comprising a depth camera and a two-dimensional camera comprises the steps of: capturing, by a depth camera, a scene and an object in the scene to obtain initial depth data, and capturing, by the two-dimensional camera, the scene and the object to obtain two-dimensional image data; in-painting the initial depth data to obtain in-painted depth data; performing a depth buffer calculation according to the in-painted depth data and a virtual model to obtain an occlusion relationship between the object and the virtual model, and generating an occluded partial image according to the two-dimensional image data and the virtual model; estimating partially approximated polygon according to the occluded partial image; and generating an occluded result according to the partially approximated polygon, the two-dimensional image data and the virtual model.Type: ApplicationFiled: December 2, 2015Publication date: July 21, 2016Inventors: Chih-Hsing CHU, Po-Yuan HUANG
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Publication number: 20150122786Abstract: The invention provides an apparatus for fabricating a periodic micro-pattern by laser beams. The apparatus includes an ultrafast laser light source configured to generate an output laser beam. A diffraction optical element is configured to divide the output laser beam into a plurality of diffractive laser beams. A confocal system is configured to focus the plurality of diffractive laser beams on a focal point, so that the plurality of diffractive laser beams produces an interference light beam with interference phenomena. The interference light beam ablates a surface of an element to fabricate a periodic micro-pattern on the surface of the element. The confocal system includes a first lens, a second lens and a light shielding mask. The plurality of diffractive laser beams passes through the first lens, the light shielding mask and the second lens in sequence.Type: ApplicationFiled: September 25, 2014Publication date: May 7, 2015Inventors: Shih-Hsien HUANG, Shih-Hao WANG, Po-Yuan HUANG
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Publication number: 20150055336Abstract: A pixel structure comprising an N-side light emitting surface, several reflectors and several light emitting elements is provided. N is a nature number equal to or greater than 3. The light emitting surface has a first normal line. The reflectors surround peripherals of the light emitting surface. Each reflector, which correspondingly connects with a side of the light emitting surface, is connected to its adjoining reflectors and comprises a first reflecting portion and a second reflecting portion having a second normal line and a third normal line, respectively. The second and the first normal lines intercross to form an acute angle ?, and the third and the first normal lines intercross to form an obtuse angle ?. The lights emitted by the light emitting elements are reflected by the second reflecting portion of the reflectors so that the lights are directed towards the light emitting surface.Type: ApplicationFiled: April 7, 2014Publication date: February 26, 2015Applicant: Lextar Electronics CorporationInventors: Shih-Hsien Huang, Shih-Hao Wang, Po-Yuan Huang
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Publication number: 20110271181Abstract: The present invention discloses an electronic apparatus and a screen unlocking method thereof, the electronic apparatus comprises a touch-controlled screen and a control module, and the screen unlocking method comprises the steps of displaying a first frame having a movable icon which shows a part of a second frame over the second frame on the touch-controlled screen; touching the icon and dragging the icon with a random direction and a random dragging path, and the part of the second frame shown by the icon being enlarged or reduced according to the direction and the dragging path; determining if a dragging-condition of the icon is matched with any one of the unlocking-conditions; and displaying the whole second frame when the dragging-condition of the dragged icon is matched with one of the unlocking-conditions.Type: ApplicationFiled: April 28, 2010Publication date: November 3, 2011Applicant: ACER INCORPORATEDInventors: CHIEH-CHIH TSAI, YU-MAO FENG, PO-YUAN HUANG
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Patent number: 7713112Abstract: The aim of the present invention is to provide a ceramic whetstone (3) which can accelerate sharpening cutlery smoothly. The ceramic whetstone (3) includes a ceramic stick (30) with high straightness accuracy having a plastic nut (31) at a first end, a plastic handle (32) at a second end. A bump (311) disposed on the inner area of the bottom of the plastic nut (31), a fixed bump (321) disposed inside the hollow plastic handle (32) to seal a second end, a stop plate (322) disposed on a top end of the handle (32) for shielding the area between thumb and index finger of a user, the stick (30) has an axial hole (301) accommodates the plastic nut (31) and the handle (32) fit over to both ends respectively, the bump (311) and the fixed bump (321) fit in the axial hole (301) to resist against the stick (30).Type: GrantFiled: November 1, 2007Date of Patent: May 11, 2010Inventor: Po-Yuan Huang