Patents by Inventor Po-Yuan Lo
Po-Yuan Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20140333988Abstract: The disclosure provides a color filter structure used to a reflective display. The color filter structure includes a transparent substrate, a plurality of color resists, a plurality of light-impermeable structures and a reflective layer. The transparent substrate has a top surface and a bottom surface, and the color resists are positioned on the top surface of the transparent substrate. The light-impermeable structures are positioned in the transparent substrate, in which the adjacent two color resists are separated by one of the light-impermeable structures. The reflective layer is positioned on the bottom surface of the transparent substrate. And the method for manufacturing the color filter structure is also disclosed herein.Type: ApplicationFiled: January 23, 2014Publication date: November 13, 2014Applicant: E Ink Holdings Inc.Inventors: Tai-Yuan LEE, Po-Yuan LO
-
Publication number: 20140204453Abstract: An electrophoretic display apparatus includes a drive array substrate, a color filter layer and an electrophoretic display film. The drive array substrate has a plurality of pixel units, in which each of the pixel units includes a drive device. The color filter layer is disposed on the drive array substrate and has a plurality of color filter patterns, in which each of the color filter patterns is corresponding to at least two of the pixel units. The electrophoretic display film is disposed between the drive array substrate and the color filter layer and includes a plurality of display mediums, in which the display mediums corresponding to each of the color filter patterns are controlled by at least two of the drive devices.Type: ApplicationFiled: October 22, 2013Publication date: July 24, 2014Applicant: E Ink Holdings Inc.Inventors: Po-Yuan Lo, Tai-Yuan Lee
-
Patent number: 8780437Abstract: An electrophoretic display apparatus includes a drive array substrate, a color filter layer and an electrophoretic display film. The drive array substrate has a plurality of pixel units, in which each of the pixel units includes a drive device. The color filter layer is disposed on the drive array substrate and has a plurality of color filter patterns, in which each of the color filter patterns is corresponding to at least two of the pixel units. The electrophoretic display film is disposed between the drive array substrate and the color filter layer and includes a plurality of display mediums, in which the display mediums corresponding to each of the color filter patterns are controlled by at least two of the drive devices.Type: GrantFiled: October 22, 2013Date of Patent: July 15, 2014Assignee: E Ink Holdings Inc.Inventors: Po-Yuan Lo, Tai-Yuan Lee
-
Publication number: 20140185128Abstract: A display device including a first substrate, a second substrate, a display layer, a color filter layer, a transparent electrode layer and a transparent sealing is provided. The first substrate is opposite to the second substrate. The display layer is disposed between the first substrate and the second substrate. The color filter layer is disposed between the display layer and the first substrate. The transparent electrode layer is disposed between the color filter layer and the display layer. The transparent sealing surrounds the display layer so that the display layer is sealed between the first substrate and the second substrate, wherein a curable temperature of the transparent sealing is lower than or equal to 40° C. A fabrication method of a display device is further provided herein.Type: ApplicationFiled: November 13, 2013Publication date: July 3, 2014Applicant: E Ink Holdings Inc.Inventors: Po-Yuan Lo, Tai-Yuan Lee
-
Publication number: 20130156537Abstract: A carrier and a substrate unloading method using the same are provided. The carrier comprises a bottom board, a rim and a stop board. The bottom board is for carrying a substrate. The rim is disposed on a periphery of the bottom board. The rim has at least one opening. The stop board is disposed on the rim. One end of the stop board is pivotally connected to the rim, and the other end of the stop board is rotated to the outside or the inside of the rim.Type: ApplicationFiled: May 21, 2012Publication date: June 20, 2013Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Po-Yuan Lo, Ru-De Chen
-
Patent number: 8436068Abstract: A composition and a polymer are provided. The composition includes the polymer and a melamine derivative. The polymer has a formula of R is hydrogen, halide, alkyl group, alkoxyl group, haloalkyl group or nitro group. n is 1-5 of integer. x+y+z=1, x>0, y?0, z?0. The melamine derivative includes R1 is hydrogen, CqH2q+1, or m and q independently is 1-10 of integer. R2, R3 and R4 independently is hydrogen, halide, or C1-C54 alkyl group.Type: GrantFiled: April 26, 2011Date of Patent: May 7, 2013Assignee: Industrial Technology Research InstituteInventors: Feng-Yu Yang, Meei-Yu Hsu, Gue-Wuu Hwang, Po-Yuan Lo
-
Publication number: 20120108697Abstract: A composition and a polymer are provided. The composition includes the polymer and a melamine derivative. The polymer has a formula of R is hydrogen, halide, alkyl group, alkoxyl group, haloalkyl group or nitro group. n is 1-5 of integer. x+y+z=1, x>0, y?0, z?0. The melamine derivative includes R1 is hydrogen, CqH2q+1, or m and q independently is 1-10 of integer. R2, R3 and R4 independently is hydrogen, halide, or C1-C54 alkyl group.Type: ApplicationFiled: April 26, 2011Publication date: May 3, 2012Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Feng-Yu Yang, Meei-Yu Hsu, Gue-Wuu Hwang, Po-Yuan Lo
-
Publication number: 20110115034Abstract: A transistor including a substrate, a gate, a semiconductor layer, a stacked insulating layer and a source and a drain is provided. The gate is disposed on the substrate. The semiconductor layer is disposed on the substrate, and a first type carrier is the main carrier in the semiconductor layer. The stacked insulating layer is disposed between the semiconductor layer and the gate, and includes a first insulating layer and a second insulating layer. The first insulating layer contains a first group withdrawing the first type carrier, the second insulating layer contains a second group withdrawing a second type carrier, and the first insulating layer is disposed between the semiconductor layer and the second insulating layer. The source and the drain are disposed on the substrate and at two sides of the semiconductor layer.Type: ApplicationFiled: March 26, 2010Publication date: May 19, 2011Applicant: Industrial Technology Research InstituteInventors: Po-Yuan Lo, Yu-Rung Peng, Tarng-Shiang Hu, Yi-Jen Chan
-
Patent number: 7727703Abstract: A method of fabricating an electronic device is disclosed. The method of fabricating an electronic device comprises providing a substrate. A first conductive layer is formed on the substrate. A silylation polyphenol (PVP) dielectric layer is formed on the first conductive layer. A patterned second conductive layer is formed on the silylation PVP dielectric layer.Type: GrantFiled: November 8, 2006Date of Patent: June 1, 2010Assignee: Industrial Technology Research InstituteInventors: Po-Yuan Lo, Feng-Yu Yang, Zing-Way Pei
-
Patent number: 7535081Abstract: A metal nanoline process and applications on growth of aligned nanostructures thereof. A nano-structure is provided with a substrate with at least one nanodimensional metal catalyst line disposed thereon and at least one carbon nanotube or silicon nanowire extending along an end of the metal catalyst line.Type: GrantFiled: October 21, 2004Date of Patent: May 19, 2009Assignee: Industrial Technology Research InstituteInventors: Ming-Jiunn Lai, Jeng-Hua Wei, Hung-Hsiang Wang, Po-Yuan Lo, Ming-Jer Kao
-
Publication number: 20080063983Abstract: A method of fabricating an electronic device is disclosed. The method of fabricating an electronic device comprises providing a substrate. A first conductive layer is formed on the substrate. A silylation polyphenol (PVP) dielectric layer is formed on the first conductive layer. A patterned second conductive layer is formed on the silylation PVP dielectric layer.Type: ApplicationFiled: November 8, 2006Publication date: March 13, 2008Inventors: Po-Yuan Lo, Feng-Yu Yang, Zing-Way Pei
-
Publication number: 20070238318Abstract: A method of fabricating a semiconductor device is provided. The method of fabricating the semiconductor device comprises a substrate. A polyacrylonitrile (PAN) powder is dissolved in a solvent and the solvent is heated to form a PAN solution. The PAN solution is cooled down and the PAN solution is then formed on the substrate. The PAN solution is allowed to stand and the solvent in the PAN solution is then removed to form a PAN dielectric layer on the substrate. A patterned conductive layer is formed on the PAN dielectric layer.Type: ApplicationFiled: August 25, 2006Publication date: October 11, 2007Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Hui-Lin Hsu, Tri-Rung Yew, Po-Yuan Lo, Zing-Way Pei
-
Publication number: 20070155064Abstract: A method for manufacturing a carbon nano-tube field-effect transistor (CNT-FET), comprising steps of: forming a patterned conductive layer on a substrate; forming a dielectric layer covering the conductive layer and the substrate; forming a carbon nano-tube layer between a pair of electrodes on the dielectric layer; and performing a treatment process on the carbon nano-tube layer so that the carbon nano-tube layer is semiconducting.Type: ApplicationFiled: May 10, 2006Publication date: July 5, 2007Inventors: Bae-Horng Chen, Jeng-Hua Wei, Po-Yuan Lo, Zing-Way Pei
-
Patent number: 7226531Abstract: Method of making an electroplated interconnection wire of a composite of metal and carbon nanotubes is disclosed, including electroplating a substrate having a conductive baseline on a surface thereof in an electroplating bath containing a metal ion and carbon nanotubes, so that an electroplated interconnection wire of a composite of the metal and carbon nanotubes is formed on the conductive baseline. Alternatively, a method of the present invention includes preparing a dispersion of carbon nanotubes dispersed in an organic solvent, printing a baseline with the dispersion on a surface of a substrate, evaporating the organic solvent to obtain a conductive baseline, and electroplating the surface in an electroplating bath containing a metal ion, so that an electroplated interconnection wire of a composite of the metal and carbon nanotubes is formed on the conductive baseline.Type: GrantFiled: December 12, 2005Date of Patent: June 5, 2007Assignee: Industrial Technology Research InstituteInventors: Po-Yuan Lo, Jung-Hua Wei, Bae-Horng Chen, Jih-Shun Chiang, Chian-Liang Hwang, Ming-Jer Kao
-
Publication number: 20070056855Abstract: Method of making an electroplated interconnection wire of a composite of metal and carbon nanotubes is disclosed, including electroplating a substrate having a conductive baseline on a surface thereof in an electroplating bath containing a metal ion and carbon nanotubes, so that an electroplated interconnection wire of a composite of the metal and carbon nanotubes is formed on the conductive baseline. Alternatively, a method of the present invention includes preparing a dispersion of carbon nanotubes dispersed in an organic solvent, printing a baseline with the dispersion on a surface of a substrate, evaporating the organic solvent to obtain a conductive baseline, and electroplating the surface in an electroplating bath containing a metal ion, so that an electroplated interconnection wire of a composite of the metal and carbon nanotubes is formed on the conductive baseline.Type: ApplicationFiled: December 12, 2005Publication date: March 15, 2007Applicant: Industrial Technology Research InstituteInventors: Po-Yuan Lo, Jung-Hua Wei, Bae-Horng Chen, Jih-Shun Chiang, Chian-Liang Hwang, Ming-Jer Kao
-
Publication number: 20070045612Abstract: An organic thin film transistor and a method for fabricating the same are provided. A multi-dielectric layer of the organic thin-film transistor is disposed on the substrate and the gate electrode, and then the organic layers-of the organic thin film transistor, the source and drain are produced. Because of the isolation effect of the multi-dielectric layer, the hydrophilic and lipophilic processes do not affect each other during the manufacturing of the organic thin film transistor. In addition, the multi-dielectric layer includes at least one organic dielectric layer and at least one liquid state deposited oxide silicon thin film.Type: ApplicationFiled: May 24, 2006Publication date: March 1, 2007Inventors: Po-Yuan Lo, Zing-Way Pei
-
Publication number: 20050287788Abstract: This specification discloses a manufacturing method of nanowire array. The method includes the steps of: providing a substrate; forming an insulating layer on the substrate; forming a metal catalyst layer on the insulating layer by spin on glass (SOG), the metal catalyst being Au, Ag, or Pt; forming a covering layer on the metal catalyst layer by SOG; patternizing the covering layer exposed out of the metal catalyst layer; etching the exposed metal catalyst layer to form a patternized metal catalyst layer; and forming a plurality of nanowires in the patternized metal catalyst layer.Type: ApplicationFiled: August 9, 2004Publication date: December 29, 2005Applicant: Industrial Technology Research InstituteInventors: Jeng-Hua Wei, Hung-Hsiang Wang, Po-Yuan Lo, Ming-Jer Kao
-
Publication number: 20050233585Abstract: A metal nanoline process and applications on growth of aligned nanostructures thereof. A nano-structure is provided with a substrate with at least one nanodimensional metal catalyst line disposed thereon and at least one carbon nanotube or silicon nanowire extending along an end of the metal catalyst line.Type: ApplicationFiled: October 21, 2004Publication date: October 20, 2005Inventors: Ming-Jiunn Lai, Jeng-Hua Wei, Hung-Hsiang Wang, Po-Yuan Lo, Ming-Jer Kao
-
Patent number: 6821911Abstract: A manufacturing method of carbon nanotube transistors is disclosed. The steps include: forming an insulating layer on a substrate; forming a first oxide layer on the insulating layer using a solution with cobalt ion catalyst by spin-on-glass (SOG); forming a second oxide layer on the first oxide layer using a solution without the catalyst; forming a blind hole on the second oxide layer using photolithographic and etching processes, the blind hole exposing the first oxide layer, the sidewall of the second oxide layer, and the insulating layer; forming a single wall carbon nanotube (SWNT) connecting the first oxide layer separated by the blind hole and parallel to the substrate; and forming a source and a drain connecting to both ends of the SWNT, respectively.Type: GrantFiled: December 5, 2003Date of Patent: November 23, 2004Assignee: Industrial Technology Research InstituteInventors: Po-Yuan Lo, Jih-Shun Chiang, Jeng-Hua Wei, Chien-Liang Hwang, Hung-Hsiang Wang, Ming-Jiunn Lai, Ming-Jer Kao
-
Publication number: 20040131795Abstract: The present invention provides a method to control the magnetic alloy-encapsulated carbon-base nanostructures apply an appropriate amount of magnetic field during magnetic alloy-encapsulated nanostructure deposition and post treatment for improved magnetic anisotropy by electron cyclotron resonance chemical vapor deposition (ECR-CVD), the catalyst and additive on surface of substrate use DC bias and heating treatment and then etching the substrate during plasma pretreatment. The present invention is to provide control of the size and shape of the nanostructures, capability to be effectively manipulated the magnetic anisotropy and coercive force of the encapsulated magnetic nanoparticles, capability to store the magnetic signals with nano-resolution.Type: ApplicationFiled: November 25, 2003Publication date: July 8, 2004Applicant: National Chiao Tung UniversityInventors: Cheng-Tzu Kuo, Chao-Hsun Lin, An-Ya Lo, Po-Yuan Lo