Abstract: A method for manufacturing a semiconductor device includes: forming a first fin portion and a second fin portion on a semiconductor substrate, the first fin portion and the second fin portion being spaced apart from each other; and forming a first gate dielectric layer and a second gate dielectric layer on the first fin portion and the second fin portion, respectively, the first gate dielectric layer having a first thickness, the second gate dielectric layer having a second thickness different from the first thickness.

Abstract: An electronic package and a manufacturing method thereof are provided, in which a photonic integrated circuit chip and an electronic integrated circuit chip are disposed on opposite sides of an interposer respectively, and the photonic integrated circuit chip and the electronic integrated circuit chip can accomplish signal connection with each other via a plurality of conductive vias in the interposer directly, thereby reducing the power consumption and transmission delay of the signals transmitted between the circuits.

Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.

Abstract: An electronic package is provided and includes: a thermally conductive chip; a circuit structure having a circuit layer; and an electronic component disposed between the circuit structure and the thermally conductive chip and electrically connected to the circuit layer, so as to dissipate the heat generated during the operation of the electronic component via the thermally conductive chip. A method of manufacturing the electronic package is further provided.

Abstract: A semiconductor device includes a substrate having fins and trenches in between the fins, a plurality of insulators, a first metal layer, an insulating layer, a second metal layer and an interlayer dielectric. The insulators are disposed within the trenches of the substrate. The first metal layer is disposed on the plurality of insulators and across the fins. The insulating layer is disposed on the first metal layer over the plurality of insulators and across the fins. The second metal layer is disposed on the insulating layer over the plurality of insulators and across the fins. The interlayer dielectric is disposed on the insulators and covering the first metal layer, the insulating layer and the second metal layer.

Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.

Abstract: An electronic package and a manufacturing method thereof are provided, in which a full-panel wafer is provided and includes a plurality of electronic bodies arranged in an array at intervals, a plurality of trenches are formed across the electronic bodies along a first direction on the full-panel wafer, so that the trenches on a single electronic body are arranged parallel to each other at interval and along a second direction perpendicular to the first direction. Then, in a singulation process, any trench can be selected for cutting to obtain a plurality of electronic elements of a required size. Finally, each of the electronic elements is disposed on a packaging region of a carrier structure, so that each of the electronic elements is electrically connected to at least a portion of electrical contact pads in the packaging region.

Abstract: An electronic package and the manufacturing method thereof are provided, in which a photonic element and an electronic element are embedded in an encapsulation layer, and the photonic element has an external contact area exposed from the encapsulation layer, such that signals of the electronic element can be directly transmitted to an optical fiber via the external contact area of the photonic element to achieve the purpose of photoelectric integration.

Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.

Abstract: An electrical connector includes a stiffener, a rail frame pivotally mounted to one end of the stiffener, a carrier frame assembled to the rail frame in a sliding manner, and a load plate pivotally mounted to the end of the stiffener outside of the rail frame. The carrier frame includes latches to retain the CPU thereon. The rail frame includes a pair of opposite sliding channels extending in the front-to-back direction, along which the carrier frame is moveable. A front transverse bar is located in front of the sliding channels and above the sliding channels in the vertical direction.

Abstract: An electrical connector includes a fastener plate, a rail frame pivotally mounted to one end of the fastener plate, a carrier frame assembled to the rail frame in a sliding manner, and a load plate pivotally mounted to the end of the fastener plate outside of the rail frame. The carrier frame includes latches to retain the CPU thereon. The rail frame includes a pair of opposite sliding channels extending in the front-to-back direction, along which the carrier frame is moveable. A front transverse bar is located in front of the sliding channels. A pair of protection blocks are located in front of the pair of sliding channels for protecting the latches of the carrier frame or the CPU.

Abstract: An electrical connector includes a stiffener, a rail frame pivotally mounted to one end of the stiffener, a carrier frame assembled to the rail frame in a sliding manner, and a load plate pivotally mounted to the end of the stiffener outside of the rail frame. The carrier frame includes latches to retain the CPU thereon. The rail frame includes a pair of opposite sliding channels extending in the front-to-back direction, along which the carrier frame is moveable. A front transverse bar is located in front of the sliding channels and above the sliding channels in the vertical direction.

Abstract: An electrical connector includes a fastener, a rail frame pivotally mounted to one end of the fastener, a carrier frame assembled to the rail frame in a sliding manner, and a load plate pivotally mounted to the end of the fastener outside of the rail frame. The carrier frame includes latches to retain the CPU thereon. The rail frame includes a pair of opposite sliding channels extending in the front-to-back direction, along which the carrier frame is moveable. A front transverse bar is located in front of the sliding channels. A pair of protection blocks are located in front of the pair of sliding channels for protecting the latches of the carrier frame or the CPU.

Abstract: The electrical connector assembly includes an insulative housing and a plurality of contacts retained in the housing. The stand includes a support and a spring supporting the support. The electrical connector is seated upon the support and moveable along with the support in the vertical direction due to deformation of the spring. Each of the contacts includes an upper contacting section and a lower contacting section. An electronic component located upon the housing and downwardly pressing and mechanically and electrically connected to the upper contacting sections. An FPC is sandwiched between the support and the electrical connector and mechanically and electrically connected to the lower contacting sections.

Abstract: The electrical connector includes a frame to assemble a plurality of socket thereto. Each socket includes a plurality of contacts, two inner sides in confrontation with the neighboring sockets, and two outer sides in confrontation with the frame. The frame includes an exterior peripheral structure and an interior cross structure. The outer sides are attached to the exterior peripheral structure while the inner sides are attached to the interior cross structure.

Abstract: The electrical connector assembly includes an insulative housing and a plurality of contacts retained in the housing. The stand includes a support and a spring supporting the support. The electrical connector is seated upon the support and moveable along with the support in the vertical direction due to deformation of the spring. Each of the contacts includes an upper contacting section and a lower contacting section. An electronic component located upon the housing and downwardly pressing and mechanically and electrically connected to the upper contacting sections. An FPC is sandwiched between the support and the electrical connector and mechanically and electrically connected to the lower contacting sections.

Abstract: The electrical connector includes a frame to assemble a plurality of socket thereto. Each socket includes a plurality of contacts, two inner sides in confrontation with the neighboring sockets, and two outer sides in confrontation with the frame. The frame includes an exterior peripheral structure and an interior cross structure. The outer sides are attached to the exterior peripheral structure while the inner sides are attached to the interior cross structure.

Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a semiconductor substrate, at least one deep n-well in the semiconductor substrate, at least one p-channel metal-oxide-semiconductor transistor in the deep n-well, at least one n-channel metal-oxide-semiconductor transistor outside of the deep n-well, an first interconnect structure, and a protection component. Both of the p-channel metal-oxide-semiconductor transistor and the n-channel metal-oxide-semiconductor transistor are disposed in the semiconductor substrate, and are electrically coupled by the first interconnect structure. The protection component is disposed in the semiconductor substrate, wherein the protection component is electrically coupled to the deep n-well.

Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a semiconductor substrate, at least one deep n-well in the semiconductor substrate, at least one p-channel metal-oxide-semiconductor transistor in the deep n-well, at least one n-channel metal-oxide-semiconductor transistor outside of the deep n-well, an first interconnect structure, and a protection component. Both of the p-channel metal-oxide-semiconductor transistor and the n-channel metal-oxide-semiconductor transistor are disposed in the semiconductor substrate, and are electrically coupled by the first interconnect structure. The protection component is disposed in the semiconductor substrate, wherein the protection component is electrically coupled to the deep n-well.