Patents by Inventor Po-Yuan Yang

Po-Yuan Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250193108
    Abstract: In the initial phase, the master device is configured to disable the connection between the junction device and the last slave device before performing the EtherCAT distributed clock synchronization procedure. After completion, the connection between the junction device and the last slave device is enabled. When a disconnection occurs in a closed loop topology, the junction device can serve to provide a redundant path for forwarding datagrams, thereby achieving cable redundancy. After the disconnection is fixed, the system time delay of each slave device calculated during the initial phase can still be applied without needing to perform again the distributed clock synchronization procedure.
    Type: Application
    Filed: March 14, 2024
    Publication date: June 12, 2025
    Applicant: Delta Electronics, Inc.
    Inventors: Yu Hsin CHANG, Yu Min CHOU, Po Yuan YANG, Yu Liang CHEN
  • Patent number: D527015
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: August 22, 2006
    Assignee: Tatung Co., Ltd.
    Inventor: Po-Yuan Yang