Patents by Inventor Pochin Hsu

Pochin Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8004447
    Abstract: The configuration of a successive approximation analog to digital converter (ADC) and a method thereof are provided in the present invention. The proposed configuration includes a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal outputting a comparison result, a most significant bit ADC coupled to the non-inverting input terminal, and a least significant bit ADC coupled to the inverting input terminal.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: August 23, 2011
    Assignee: Holtek Semiconductor
    Inventor: Pochin Hsu
  • Publication number: 20110084866
    Abstract: The configuration of a successive approximation analog to digital converter (ADC) and a method thereof are provided in the present invention. The proposed configuration includes a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal outputting a comparison result, a most significant bit ADC coupled to the non-inverting input terminal, and a least significant bit ADC coupled to the inverting input terminal.
    Type: Application
    Filed: January 26, 2010
    Publication date: April 14, 2011
    Applicant: HOLTEK SEMICONDUCTOR INC.
    Inventor: Pochin HSU
  • Patent number: 6177899
    Abstract: An A/D converter having multiple conversions is described. The first conversion determines the Most Significant Bits of the output digital code and a second conversion determines the Least Significant Bits of the output digital code. A multiple reference voltage comparator for use in an A/D converter is described. The multiple reference voltage comparator allows one set of voltage comparators to be used in creating coarse and fine thermometer codes that respectively determine the Most Significant Bits and the Least Significant Bits of the digital code. Further, a set of error detection voltage comparators is provided to determine errors in the coarse thermometer code and allow correction during encoding of the Most Significant Bits.
    Type: Grant
    Filed: July 29, 1998
    Date of Patent: January 23, 2001
    Assignee: Etrend Electronics, Inc.
    Inventor: Pochin Hsu