Abstract: Examples described herein relate to modular power supply unit. The modular power supply unit may include an output connector through which the modular power supply unit is removably connectible to a host circuit board. The output connector includes ID pins to receive signals indicative of a power demand corresponding to the host circuit board. Further, the modular power supply unit may include a voltage regulator to output an electrical power at a plurality of power settings. Moreover, the modular power supply unit may include control unit coupled to the output connector and the voltage regulator. The control unit may determine a power demand code based on the signals received at the one or more ID pins; identify a power setting, from the plurality of power settings, based on the determined power demand code; and cause the voltage regulator to generate the electrical power at the identified power setting.

Abstract: Examples described herein relate to modular power supply unit. The modular power supply unit may include an output connector through which the modular power supply unit is removably connectible to a host circuit board. The output connector includes ID pins to receive signals indicative of a power demand corresponding to the host circuit board. Further, the modular power supply unit may include a voltage regulator to output an electrical power at a plurality of power settings. Moreover, the modular power supply unit may include control unit coupled to the output connector and the voltage regulator. The control unit may determine a power demand code based on the signals received at the one or more ID pins; identify a power setting, from the plurality of power settings, based on the determined power demand code; and cause the voltage regulator to generate the electrical power at the identified power setting.

Abstract: A system for reducing power consumption in an electronic device comprising at least one electronic chip comprises a plurality of local access network (LAN) ports, a transceiver coupled between the LAN ports and the electronic chip, a PLA device, and a central processing unit (CPU). The CPU is configured to power off the electronic chip in response to a period of inactivity on the LAN ports and power on the electronic chip in response to a signal from the PLA device.

Abstract: In one embodiment, a chip carrier support system includes a chip carrier support structure and a chip carrier. The chip carder forms a complementary fit with the chip carder support structure and includes an integrated circuit and a plurality of leads in communication with the integrated circuit.

Abstract: A reversible air flow fan system is described. A fan tray assembly is coupled with a chassis and a removable fan and bracket assembly that is oriented in a first direction. This removable fan and bracket assembly is configured to be removable from the fan tray assembly and being recoupled with the fan tray assembly in a second direction opposite the first direction. An air duct is coupled with and enables the exchange of air between the removable fan and bracket assembly and a first surface of the chassis. A sensor coupled with the fan tray assembly is configured for coupling with at least one bracket of the removable fan and bracket assembly when the removable fan and bracket assembly is oriented in the first direction.

Abstract: A system for reducing power consumption in an electronic device comprising at least one electronic chip comprises a plurality of local access network (LAN) ports, a transceiver coupled between the LAN ports and the electronic chip, a PLA device, and a central processing unit (CPU). The CPU is configured to power off the electronic chip in response to a period of inactivity on the LAN ports and power on the electronic chip in response to a signal from the PLA device.

Abstract: A system for reducing power consumption in an electronic device comprising at least one electronic chip comprises a plurality of local access network (LAN) ports, a transceiver coupled between the LAN ports and the electronic chip, a PLA device, and a central processing unit (CPU). The CPU is configured to power off the electronic chip in response to a period of inactivity on the LAN ports and power on the electronic chip in response to a signal from the PLA device.

Abstract: A system for reducing power consumption in an electronic device comprising at least one electronic chip comprises a plurality of local access network (LAN) ports, a transceiver coupled between the LAN ports and the electronic chip, a PLA device, and a central processing unit (CPU). The CPU is configured to power off the electronic chip in response to a period of inactivity on the LAN ports and power on the electronic chip in response to a signal from the PLA device.