Abstract: A decision tree and normalized reclassification are used to classify defects. Defect review sampling and normalization can be used for accurate Pareto ranking and defect source analysis. A defect review system, such as a broadband plasma tool, and a controller can be used to bin defects using the decision tree based on defect attributes and design attributes. Class codes are assigned to at least some of the defects in each bin. Normalized reclassification assigns a class code to any unclassified defects in a bin. Additional decision trees can be used if any bin has more than one class code after normalized reclassification.

Abstract: Defect inspection methods and systems that use process conditions to dynamically determine how to perform defect inspections during a semiconductor manufacturing process are disclosed. A defect inspection method may include: obtaining process conditions from a process tool utilized to process at least one wafer; determining whether to perform defect inspection of a layer, a wafer, or a high risk area/spot within the at least one wafer based on the process conditions obtained; bypassing the defect inspection when it is determined not to perform the defect inspection; and performing the defect inspection after the at least one wafer is processed by the process tool when it is determined to perform the defect inspection.

Abstract: Methods and systems for generating a wafer inspection process are provided. One method includes storing output of detector(s) of an inspection system during scanning of a wafer regardless of whether the output corresponds to defects detected on the wafer and separating physical locations on the wafer that correspond to bit failures detected by testing of the water into a first portion of the physical locations at which the defects were not detected and a second portion of the physical locations at which the defects were detected. In addition, the method includes applying defect detection method(s) to the stored output corresponding to the first portion of the physical locations to detect defects at the first portion of the physical locations and generating a wafer inspection process based on the defects detected by the defect detection method(s) at the first portion of the physical locations.

Abstract: A decision tree and normalized reclassification are used to classify defects. Defect review sampling and normalization can be used for accurate Pareto ranking and defect source analysis. A defect review system, such as a broadband plasma tool, and a controller can be used to bin defects using the decision tree based on defect attributes and design attributes. Class codes are assigned to at least some of the defects in each bin. Normalized reclassification assigns a class code to any unclassified defects in a bin. Additional decision trees can be used if any bin has more than one class code after normalized reclassification.

Abstract: Methods and systems for generating a wafer inspection process are provided. One method includes storing output of detector(s) of an inspection system during scanning of a wafer regardless of whether the output corresponds to defects detected on the wafer and separating physical locations on the wafer that correspond to bit failures detected by testing of the water into a first portion of the physical locations at which the defects were not detected and a second portion of the physical locations at which the defects were detected. In addition, the method includes applying defect detection method(s) to the stored output corresponding to the first portion of the physical locations to detect defects at the first portion of the physical locations and generating a wafer inspection process based on the defects detected by the defect detection method(s) at the first portion of the physical locations.

Abstract: Methods and systems for generating a wafer inspection process are provided. One method includes storing output of detector(s) of an inspection system during scanning of a wafer regardless of whether the output corresponds to defects detected on the wafer and separating physical locations on the wafer that correspond to bit failures detected by testing of the wafer into a first portion of the physical locations at which the defects were not detected and a second portion of the physical locations at which the defects were detected. In addition, the method includes applying defect detection method(s) to the stored output corresponding to the first portion of the physical locations to detect defects at the first portion of the physical locations and generating a wafer inspection process based on the defects detected by the defect detection method(s) at the first portion of the physical locations.