Abstract: The present disclosure relates to a semiconductor device. The semiconductor device includes semiconductor substrate and a BEOL dielectric having x number of intermetal dielectric (IMD) layers, wherein an ith ILD layer, where i=1 to x, includes a metal dielectric layer Mi with metal lines, and a via dielectric layer Vi above the Mi, the via dielectric layer includes via contacts, the via contacts are coupled to metal lines of Mi and Mi+1. The semiconductor device also includes a process control monitoring (PCM) structure for monitoring via contact landing of via contacts of Vi landing on metal lines of Mi. The PCM structure includes a lower PCM interconnect disposed on Mi. The PCM structure also PCM via contacts, wherein the PCM via contacts are disposed proximately to the lower metal interconnect and extend below a top surface of the lower PCM interconnect by an overlap distance OV, the PCM via contacts are separated by dielectric of Mi.

Abstract: A Metal-Insulator-Metal Capacitor and Method for Fabricating Metal-Insulator-Metal Capacitor Structures. The MIM (Metal insulator Metal) capacitor structure comprising a Capacitor Top Metal (CTM); a dielectric; and a Capacitor Bottom Metal (CBM); said CTM comprising an etch stop portion; a conductivity portion having a lower resistivity compared to the etch stop portion; and an interface portion of a different material from the conductivity portion; wherein the conductivity portion is sandwiched between the etch stop portion and the interface portion; and the interface portion interfaces the CTM with the dielectric.

Abstract: A configuration composed of multiple short emitters still share common DTI regions and a single big piece of base poly. This allows for base current to flow in 4 directions (e.g., 2 dimensions) as opposed to only two. This significantly reduces the base resistance of the transistor that is crucial for better NPN transistor RF performance and high frequency noise performance.