Patents by Inventor Poh Leng Eu

Poh Leng Eu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11056457
    Abstract: A packaged semiconductor device includes a substrate having input/output (I/O) pads, a semiconductor die attached to the substrate and electrically connected to the substrate with bond wires. A bond-wire reinforcement structure is formed over the bond wires before the assembly is covered with a molding compound. The bond-wire reinforcement structure prevents wire sweep during molding and protects the wires from shorting with other wires. In one embodiment, the bond-wire reinforcement structure is formed with a fiberglass and liquid epoxy mixture.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: July 6, 2021
    Assignee: NXP USA, INC.
    Inventors: Boon Yew Low, Lan Chu Tan, Wai Yew Lo, Poh Leng Eu, Chin Teck Siong
  • Publication number: 20200105709
    Abstract: A packaged semiconductor device includes a substrate having input/output (I/O) pads, a semiconductor die attached to the substrate and electrically connected to the substrate with bond wires. A bond-wire reinforcement structure is formed over the bond wires before the assembly is covered with a molding compound. The bond-wire reinforcement structure prevents wire sweep during molding and protects the wires from shorting with other wires. In one embodiment, the bond-wire reinforcement structure is formed with a fiberglass and liquid epoxy mixture.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 2, 2020
    Inventors: Boon Yew Low, Lan Chu Tan, Wai Yew Lo, Poh Leng Eu, Chin Teck Siong
  • Patent number: 9646853
    Abstract: A patterned, non-conductive substrate for an integrated circuit (IC) package has a die side configured to receive a die and a lead side opposite the die side. A pattern formed in the substrate defines openings (e.g., holes, steps, grooves, and/or cavities) that extend between the die side and the lead side of the substrate. In the IC package, the openings are filled with conductive material (e.g., solder) that supports electrical connections between bond pads on the die and leads formed from the conductive material. The substrate can be used to form a relatively inexpensive, quad flat no-lead (QFN) IC package without using a metal lead frame and without bond wires.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: May 9, 2017
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kai Yun Yow, Poh Leng Eu
  • Publication number: 20170110339
    Abstract: A patterned, non-conductive substrate for an integrated circuit (IC) package has a die side configured to receive a die and a lead side opposite the die side. A pattern formed in the substrate defines openings (e.g., holes, steps, grooves, and/or cavities) that extend between the die side and the lead side of the substrate. In the IC package, the openings are filled with conductive material (e.g., solder) that supports electrical connections between bond pads on the die and leads formed from the conductive material. The substrate can be used to form a relatively inexpensive, quad flat no-lead (QFN) IC package without using a metal lead frame and without bond wires.
    Type: Application
    Filed: October 15, 2015
    Publication date: April 20, 2017
    Inventors: KAI YUN YOW, Poh Leng Eu
  • Patent number: 9196576
    Abstract: A semiconductor device has a die mounted on a die paddle that is elevated above and thermally connected via tie bars to a heat sink structure. Heat generated by the die flows from the die to the die paddle to the tie bars to the heat sink structure and then to either the external environment or to an external heat sink. By elevating the die/paddle sub-assembly above the heat sink structure, the packaged device is less susceptible to delamination between the die and die attach adhesive and/or the die attach adhesive and the die paddle. An optional heat sink ring can surround the die paddle.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: November 24, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kai Yun Yow, Poh Leng Eu, Meng Kong Lye, You Ge, Penglin Mei
  • Patent number: 9165855
    Abstract: A packaged semiconductor device has an integrated circuit (IC) die and a heat spreader. The heat spreader has a first portion with holes formed entirely therethrough. The first portion is attached to the die using thermally-conductive adhesive that fills the holes. The holes enable the heat spreader to be attached to the die without placing excess pressure on the IC die that could cause the die to crack.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: October 20, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kai Yun Yow, Poh Leng Eu
  • Publication number: 20150235981
    Abstract: A method of attaching a bond wire to an electrical contact pad includes performing a first electric flame off (EFO) on the end of the bond wire at a first setting to pre-form a free air ball (FAB) on the end of the wire, and performing a second EFO on the end of the bond wire at a second setting, after performing the first EFO, to fully form the FAB.
    Type: Application
    Filed: November 24, 2014
    Publication date: August 20, 2015
    Inventors: Poh Leng Eu, Cheng Choi Yong
  • Patent number: 9030000
    Abstract: A semiconductor package has a substrate with a solder mask layer, and upper and lower surfaces. Conductive traces and electrical contacts are formed on the substrate, and vias are formed in the substrate to electrically connect the conductive traces and electrical contacts. A semiconductor die is attached on the upper surface of the substrate. A mold cap is formed on the upper surface of the substrate and covers the die and the conductive traces. The mold cap includes a mold body having clipped corners and extensions that extend from each of the clipped corners. The extensions and clipped corners help prevent package cracking.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: May 12, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Poh Leng Eu, Boon Yew Low, Kai Yun Yow
  • Publication number: 20150084169
    Abstract: A semiconductor device has a die mounted on a die paddle that is elevated above and thermally connected via tie bars to a heat sink structure. Heat generated by the die flows from the die to the die paddle to the tie bars to the heat sink structure and then to either the external environment or to an external heat sink. By elevating the die/paddle sub-assembly above the heat sink structure, the packaged device is less susceptible to delamination between the die and die attach adhesive and/or the die attach adhesive and the die paddle. An optional heat sink ring can surround the die paddle.
    Type: Application
    Filed: May 15, 2014
    Publication date: March 26, 2015
    Inventors: Kai Yun Yow, Poh Leng Eu, Meng Kong Lye, You Ge, Penglin Mei
  • Publication number: 20150054099
    Abstract: A semiconductor sensor device is assembled using a pre-molded lead frame having first and second die flags. The first die flag includes a cavity. A pressure sensor die (P-cell) is mounted within the cavity and a master control unit die (MCU) is mounted to the second flag. The P-cell and MCU are electrically connected to leads of the lead frame with bond wires. The die attach and wire bonding steps are each done in a single pass. A mold pin is placed over the P-cell and then the MCU is encapsulated with a mold compound. The mold pin is removed leaving a recess that is next filled with a gel material. Finally a lid is placed over the P-cell and gel material. The lid includes a hole that that exposes the gel-covered active region of the pressure sensor die to ambient atmospheric pressure outside the sensor device.
    Type: Application
    Filed: August 25, 2013
    Publication date: February 26, 2015
    Inventors: Kai Yun Yow, Poh Leng Eu, Chee Seng Foong, Navas Khan Oratti Kalandar, Lan Chu Tan
  • Publication number: 20150014793
    Abstract: A semiconductor sensor device has a lead frame having an outer frame with wire bond pads and a die pad to which a pressure sensor die is mounted. The die pad is vertically offset from the outer frame and wire bond pads by tie bars that have down set structures. The die pad has an opening, and the sensor die is mounted on the first die attach pad such that the opening provides access to an active region of the sensor die. Pressure sensitive gel is applied over the active region of the sensor die. Molding compound covers the sensor die and gel. The molding compound has a hole corresponding to the opening in the die pad to enable ambient atmospheric pressure outside of the sensor device to reach the sensor die via the pressure sensitive gel.
    Type: Application
    Filed: July 15, 2013
    Publication date: January 15, 2015
    Inventors: Kai Yun Yow, Poh Leng Eu
  • Publication number: 20140374151
    Abstract: A wire bonded electrical interconnection includes a first electrical contact, a second electrical contact, and a bond wire having a first end bonded to the first electrical contact, a second end bonded to the second electrical contact, and a central portion connecting the first and second ends. The central portion includes notches formed during a wire bonding process, with each notch having at least two corners.
    Type: Application
    Filed: June 24, 2013
    Publication date: December 25, 2014
    Inventors: Jia Lin Yap, Poh Leng Eu, Ahmad Termizi Suhaimi
  • Publication number: 20140367840
    Abstract: A semiconductor package has a substrate with a solder mask layer, and upper and lower surfaces. Conductive traces and electrical contacts are formed on the substrate, and vias are formed in the substrate to electrically connect the conductive traces and electrical contacts. A semiconductor die is attached on the upper surface of the substrate. A mold cap is formed on the upper surface of the substrate and covers the die and the conductive traces. The mold cap includes a mold body having clipped corners and extensions that extend from each of the clipped corners. The extensions and clipped corners help prevent package cracking.
    Type: Application
    Filed: June 14, 2013
    Publication date: December 18, 2014
    Inventors: Poh Leng Eu, Boon Yew Low, Kai Yun Yow
  • Publication number: 20140263584
    Abstract: A method of making an electrical connection includes passing a bond wire through a wire bonding system having a wire polisher and a wire bonding tool. The wire polisher removes contamination from a first portion of the bond wire. A first bond is then formed by bonding the first portion of the bond wire to a first contact such that the bond wire and the first device are electrically connected. A second bond is then formed by bonding a second portion of the bond wire to a second contact such that the first contact and the second contact are electrically connected.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Inventors: Jia Lin Yap, Yin Kheng Au, Poh Leng Eu, Hung Yang Leong, Mohd Rusli Ibrahim, Navas Khan Oratti Kalandar, Mohd Faizal Zul-Kifli
  • Publication number: 20140110461
    Abstract: A system for cleaning bond wire for use by a wire bonding machine includes a bond wire supply station, a bond wire cleaning bath station, a bond wire neutralizing station, a bond wire drying station, and a wire bonding machine. In operation, the bonding machine is supplied with bond wire stored at the supply station, which is firstly de-oxidized with a cleaning solution in the cleaning bath station. Next, the cleaning solution on the bond wire is neutralized with a neutralizing liquid in the neutralizing station. The bond wire is then dried in the drying station. The speed of the bond wire passing through the cleaning bath station, neutralizing station and drying station is controlled by the wire bonding machine.
    Type: Application
    Filed: December 16, 2012
    Publication date: April 24, 2014
    Inventors: Mohd Rusli Ibrahim, Yin Kheng Au, Poh Leng Eu
  • Patent number: 8643169
    Abstract: A packaged semiconductor device with a cavity formed by a cover or lid mounted to a substrate. The lid covers one or more semiconductor sensor dies mounted on the substrate. The dies are coated with a gel or spray on coating, and the lid is encapsulated with a mold compound. A hole or passage may be formed through the cover and mold compound to expose the sensor dies to selected environmental conditions.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: February 4, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kai Yun Yow, Poh Leng Eu
  • Patent number: 8501517
    Abstract: A method of assembling a pressure sensor device includes providing a substrate having a plurality of substrate connection pads. A pressure sensor die is attached to a first major surface of the substrate and bond pads of the pressure sensor die are electrically connected to the respective substrate connection pads. A retractable cavity pin is placed on the first major surface of the substrate such that the cavity pin covers the pressure sensor die and the electrical connections to the die. A molding compound is then dispensed onto the first major surface of the substrate such that the molding compound surrounds the pressure sensor die and the cavity pin. The cavity pin is retracted such that a cavity is formed around the pressure sensor die and a gel material is dispensed within the cavity such that the gel material fills the cavity and covers the pressure sensor die.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: August 6, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kai Yun Yow, Poh Leng Eu
  • Publication number: 20130113054
    Abstract: A packaged semiconductor device with a cavity formed by a cover or lid mounted to a substrate. The lid covers one or more semiconductor sensor dies mounted on the substrate. The dies are coated with a gel or spray on coating, and the lid is encapsulated with a mold compound. A hole or passage may be formed through the cover and mold compound to expose the sensor dies to selected environmental conditions.
    Type: Application
    Filed: November 9, 2011
    Publication date: May 9, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Kai Yun Yow, Poh Leng Eu
  • Patent number: 8198143
    Abstract: A mold (10) including a first mold part (12) and a second mold part (14) define a mold cavity (16) therebetween. A gate (18) is formed in at least one of the first and second mold parts (12) and (14) such that the gate (18) communicates with the mold cavity (16). A vent (20) having a constricted portion (22) is arranged to communicate with the mold cavity (16). A substrate (28) including a base substrate (30) and an electrically conductive pattern (32) and (34) formed on the base substrate (30) may be received in the mold (10). A solder resist layer (36) is formed on the base substrate (30) and a portion of the electrically conductive pattern (32). A plurality of grooves (38) and (40) is formed in a staggered arrangement around a periphery of a molding area (42) on the substrate (28).
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: June 12, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Poh Leng Eu, Boon Yew Low, Wai Keong Wong
  • Publication number: 20120074549
    Abstract: A semiconductor device has a die attached to a die pad and electrically connected to lead fingers. The die, a top surface of the die pad, and a first portion of the lead fingers are covered with a mold compound. A second portion of the lead fingers project from the mold compound and allow for external electrical connection to the die. The mold compound around the die and lead fingers is extended such that a cavity is formed below the die pad. The die pad is exposed via the cavity. A heat sink may be inserted into the cavity and attached to the bottom surface of the die pad.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 29, 2012
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kai Yun YOW, Poh Leng Eu