Patents by Inventor Po-Hao WANG
Po-Hao WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12072909Abstract: A method and device for data synchronization, a storage medium and an electronic device are provided. The method for data synchronization includes operations as follows. Synchronization configuration information for data to be synchronized is determined, and the synchronization configuration information at least includes a data identification of the data to be synchronized and a source data table identification of a source data table where the data to be synchronized is located. A source database is queried based on the source data table identification to obtain a target source data table where the data to be synchronized is located. A field identification of the data to be synchronized is determined from the target source data table based on the data identification. A target data table is constructed based on the field identification, and the data to be synchronized is synchronized into the target data table.Type: GrantFiled: August 30, 2022Date of Patent: August 27, 2024Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: Chung-Hsiung Lee, Kewu Sun, Lu Yu, Po-Hao Wang, Delong Huang
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Patent number: 11879129Abstract: This disclosure concerns the use of endogenous plant RNAi machinery to preferentially or specifically reduce transgene expression. In some embodiments, the disclosure concerns specific reduction of transgene expression in seed tissues of a dicot plant.Type: GrantFiled: September 12, 2022Date of Patent: January 23, 2024Inventors: Andrew J. Bowling, Marcelo Ariel German, Todd P. Glancy, Sandeep Kumar, Heather Pence, Andrew E. Robinson, Shreedharan Sriram, Po-Hao Wang, Carla N. Yerkes
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Patent number: 11869100Abstract: The embodiments of the present application provide a data consolidation analysis method and a data consolidation analysis method. The data consolidation analysis system includes: a first acquiring module, which is configured to acquire machine event data; a second acquiring module, which is configured to acquire production event data; a data processing module, which is connected with the first acquiring module and the second acquiring module and configured to acquire a raw process time of each product and a production capacity index of each batch of products; and an analyzing module, which is connected with the data processing module and configured to acquire a first matching relationship between the production capacity index of each batch of products and the raw process time of each product.Type: GrantFiled: October 28, 2021Date of Patent: January 9, 2024Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Po-Hao Wang
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Publication number: 20230281220Abstract: A method and device for data synchronization, a storage medium and an electronic device are provided. The method for data synchronization includes operations as follows. Synchronization configuration information for data to be synchronized is determined, and the synchronization configuration information at least includes a data identification of the data to be synchronized and a source data table identification of a source data table where the data to be synchronized is located. A source database is queried based on the source data table identification to obtain a target source data table where the data to be synchronized is located. A field identification of the data to be synchronized is determined from the target source data table based on the data identification. A target data table is constructed based on the field identification, and the data to be synchronized is synchronized into the target data table.Type: ApplicationFiled: August 30, 2022Publication date: September 7, 2023Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: CHUNG-HSIUNG LEE, Kewu Sun, Lu Yu, Po-Hao Wang, Delong Huang
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Publication number: 20230203528Abstract: Embodiments disclosed herein relate to the field of plant molecular biology, specifically to DNA constructs for conferring insect resistance to a plant. Embodiments disclosed herein relate to insect resistant corn plant containing event DAS-01131-3, and to assays for detecting the presence of event DAS-01131-3 in samples and compositions thereof.Type: ApplicationFiled: November 15, 2022Publication date: June 29, 2023Applicant: PIONEER HI-BRED INTERNATIONAL, INC.Inventors: ANDREW ASBERRY, BIN CONG, VIRGINIA CRANE, JAMES EDWARD KING, JASDEEP S. MUTTI, DENNIS O'NEILL, M. ALEJANDRA PASCUAL, MARIA MAGDALENA VAN DYK, PO-HAO WANG, AARON T. WOOSLEY, SARAH E. WORDEN
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Publication number: 20230136893Abstract: This disclosure concerns the use of endogenous plant RNAi machinery to preferentially or specifically reduce transgene expression. In some embodiments, the disclosure concerns specific reduction of transgene expression in seed tissues of a dicot plant.Type: ApplicationFiled: September 12, 2022Publication date: May 4, 2023Applicant: CORTEVA AGRISCIENCE LLCInventors: ANDREW J. BOWLING, MARCELO ARIEL GERMAN, TODD P. GLANCY, SANDEEP KUMAR, HEATHER PENCE, ANDREW E. ROBINSON, SHREEDHARAN SRIRAM, PO-HAO WANG, CARLA N. YERKES
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Patent number: 11527491Abstract: A substrate structure has an obtuse portion formed between a side surface and a bottom surface of a substrate body. The obtuse portion includes a plurality of turning surfaces to disperse the stress of the substrate body generated in the packaging process. Therefore, the substrate body is prevented from being cracked. A method for fabricating the substrate structure and an electronic package including the substrate structure are also provided.Type: GrantFiled: June 3, 2021Date of Patent: December 13, 2022Assignee: Siliconware Precision Industries Co., LtdInventors: Po-Hao Wang, Chun-Tang Lin, Shou-Qi Chang, Yu-Hsiang Hsieh
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Patent number: 11473095Abstract: This disclosure concerns the use of endogenous plant RNAi machinery to preferentially or specifically reduce transgene expression. In some embodiments, the disclosure concerns specific reduction of transgene expression in seed tissues of a dicot plant.Type: GrantFiled: April 23, 2020Date of Patent: October 18, 2022Assignee: CORTEVA AGRISCIENCE LLCInventors: Sandeep Kumar, Marcelo Ariel German, Po-Hao Wang, Todd P. Glancy, Shreedharan Sriram, Carla N. Yerkes, Andrew J. Bowling, Heather Pence, Andrew E. Robinson
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Publication number: 20220092706Abstract: The embodiments of the present application provide a data consolidation analysis method and a data consolidation analysis method. The data consolidation analysis system includes: a first acquiring module, which is configured to acquire machine event data; a second acquiring module, which is configured to acquire production event data; a data processing module, which is connected with the first acquiring module and the second acquiring module and configured to acquire a raw process time of each product and a production capacity index of each batch of products; and an analyzing module, which is connected with the data processing module and configured to acquire a first matching relationship between the production capacity index of each batch of products and the raw process time of each product.Type: ApplicationFiled: October 28, 2021Publication date: March 24, 2022Inventor: Po-Hao WANG
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Patent number: 11227842Abstract: Provided is a substrate structure, including a substrate having at least one chamfer formed on a surface thereof, and a plurality of conductive bodies formed to the substrate. Therefore, a stress generated during the packaging process is alleviated through the chamfer, and the substrate structure is prevented from being cracked. An electronic package employing the substrate structure is also provided.Type: GrantFiled: May 15, 2020Date of Patent: January 18, 2022Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Po-Hao Wang, Chang-Fu Lin, Chun-Tang Lin, Bo-Hao Chang
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Publication number: 20210296261Abstract: A substrate structure has an obtuse portion formed between a side surface and a bottom surface of a substrate body. The obtuse portion includes a plurality of turning surfaces to disperse the stress of the substrate body generated in the packaging process. Therefore, the substrate body is prevented from being cracked. A method for fabricating the substrate structure and an electronic package including the substrate structure are also provided.Type: ApplicationFiled: June 3, 2021Publication date: September 23, 2021Inventors: Po-Hao Wang, Chun-Tang Lin, Shou-Qi Chang, Yu-Hsiang Hsieh
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Patent number: 11056442Abstract: A substrate structure has an obtuse portion formed between a side surface and a bottom surface of a substrate body. The obtuse portion includes a plurality of turning surfaces to disperse the stress of the substrate body generated in the packaging process. Therefore, the substrate body is prevented from being cracked. A method for fabricating the substrate structure and an electronic package including the substrate structure are also provided.Type: GrantFiled: June 15, 2017Date of Patent: July 6, 2021Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Po-Hao Wang, Chun-Tang Lin, Shou-Qi Chang, Yu-Hsiang Hsieh
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Publication number: 20200350261Abstract: Provided is a substrate structure, including a substrate having at least one chamfer formed on a surface thereof, and a plurality of conductive bodies formed to the substrate. Therefore, a stress generated during the packaging process is alleviated through the chamfer, and the substrate structure is prevented from being cracked. An electronic package employing the substrate structure is also provided.Type: ApplicationFiled: May 15, 2020Publication date: November 5, 2020Inventors: Po-Hao Wang, Chang-Fu Lin, Chun-Tang Lin, Bo-Hao Chang
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Patent number: 10763223Abstract: Provided is a substrate structure, including a substrate having at least one chamfer formed on a surface thereof, and a plurality of conductive bodies formed to the substrate. Therefore, a stress generated during the packaging process is alleviated through the chamfer, and the substrate structure is prevented from being cracked. An electronic package employing the substrate structure is also provided.Type: GrantFiled: April 21, 2017Date of Patent: September 1, 2020Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Po-Hao Wang, Chang-Fu Lin, Chun-Tang Lin, Bo-Hao Chang
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Patent number: 10354891Abstract: An electronic package and a method for fabricating the same are provided. The method includes forming a filling material, such as an underfill, between a carrier and a plurality of electronic components and filling the filling material in a space between the electronic components to form a spacing portion. The spacing portion has a first segment and a second segment separated from each other to serve as a stress buffer zone. Therefore, when an encapsulation layer encapsulating the electronic components is subsequently ground, the present disclosure can effectively prevent the electronic components from being cracked due to stresses induced by the external grinding force.Type: GrantFiled: April 4, 2018Date of Patent: July 16, 2019Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Po-Hao Wang, Chih-Jen Yang, Yu-Chih Cheng, Chee-Key Chung, Chang-Fu Lin
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Publication number: 20190181021Abstract: An electronic package and a method for fabricating the same are provided. The method includes forming a filling material, such as an underfill, between a carrier and a plurality of electronic components and filling the filling material in a space between the electronic components to form a spacing portion. The spacing portion has a first segment and a second segment separated from each other to serve as a stress buffer zone. Therefore, when an encapsulation layer encapsulating the electronic components is subsequently ground, the present disclosure can effectively prevent the electronic components from being cracked due to stresses induced by the external grinding force.Type: ApplicationFiled: April 4, 2018Publication date: June 13, 2019Inventors: Po-Hao Wang, Chih-Jen Yang, Yu-Chih Cheng, Chee-Key Chung, Chang-Fu Lin
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Publication number: 20180254250Abstract: A substrate structure has an obtuse portion formed between a side surface and a bottom surface of a substrate body. The obtuse portion includes a plurality of turning surfaces to disperse the stress of the substrate body generated in the packaging process. Therefore, the substrate body is prevented from being cracked. A method for fabricating the substrate structure and an electronic package including the substrate structure are also provided.Type: ApplicationFiled: June 15, 2017Publication date: September 6, 2018Inventors: Po-Hao Wang, Chun-Tang Lin, Shou-Qi Chang, Yu-Hsiang Hsieh
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Publication number: 20170309579Abstract: Provided is a substrate structure, including a substrate having at least one chamfer formed on a surface thereof, and a plurality of conductive bodies formed to the substrate. Therefore, a stress generated during the packaging process is alleviated through the chamfer, and the substrate structure is prevented from being cracked. An electronic package employing the substrate structure is also provided.Type: ApplicationFiled: April 21, 2017Publication date: October 26, 2017Inventors: Po-Hao Wang, Chang-Fu Lin, Chun-Tang Lin, Bo-Hao Chang
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Publication number: 20140215284Abstract: A dynamic scaling processor device and processing method thereof, having a timing decoder, a multi-cycle controller, a correction flip-flop. The timing decoder is provided with a plurality of cycles therein, to receive a plurality of instructions, to select corresponding cycles as its predetermined cycles based on type of each instruction, and output the predetermined cycles and its corresponding instructions to the multi-cycle controller. The multi-cycle controller computes results of the instructions based on the predetermined cycles or a single cycle, and outputs them to the correction flip-flop. The error detection flip-flop utilizes a first clock signal and a stalled second clock signal, to sample a same result, and correct the results when outcomes of samplings are different.Type: ApplicationFiled: August 6, 2013Publication date: July 31, 2014Applicant: National Chung Cheng UniversityInventors: Tien-Fu CHEN, Shu-Hsuan CHOU, Po-Hao WANG, Yung-Hui YU