Patents by Inventor Polwin C. Chan

Polwin C. Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stacked integrated circuit assembly
    Patent number: 7888176
    Abstract: In one or more embodiments, a method of producing a stacked integrated circuit assembly includes providing a substrate having a top surface with at least one substrate connection pad. A first flip chip integrated circuit (FFIC) is disposed above the substrate, and a second flip chip integrated circuit (SFIC) is disposed above the FFIC. The FFIC may be disposed between the substrate and the SFIC. The method includes making at least one solder connection between the substrate connection pad and the FFIC and at least one solder connection between the FFIC and the SFIC.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: February 15, 2011
    Assignee: Raytheon Company
    Inventors: Tse E. Wong, Samuel D. Tonomura, Stephen E. Sox, Timothy E. Dearden, Clifton Quan, Polwin C. Chan, Mark S. Hauhe
  • STACKED INTEGRATED CIRCUIT ASSEMBLY
    Publication number: 20100003785
    Abstract: In one or more embodiments, a method of producing a stacked integrated circuit assembly includes providing a substrate having a top surface with at least one substrate connection pad. A first flip chip integrated circuit (FFIC) is disposed above the substrate, and a second flip chip integrated circuit (SFIC) is disposed above the FFIC. The FFIC may be disposed between the substrate and the SFIC. The method includes making at least one solder connection between the substrate connection pad and the FFIC and at least one solder connection between the FFIC and the SFIC.
    Type: Application
    Filed: September 10, 2009
    Publication date: January 7, 2010
    Applicant: RAYTHEON COMPANY
    Inventors: Tse E. WONG, Samuel D. TONOMURA, Stephen E. SOX, Timothy E. DEARDEN, Clifton QUAN, Polwin C. CHAN, Mark S. HAUHE
  • Stacked integrated circuit assembly
    Patent number: 7605477
    Abstract: A stacked integrated circuit assembly includes a substrate having a top surface with at least one substrate connection pad. A first flip chip integrated circuit (FFIC) is disposed above the substrate, and a second flip chip integrated circuit (SFIC) is disposed above the FFIC. The FFIC is disposed between the substrate and the SFIC. The stacked integrated circuit assembly includes least one solder connection between the substrate connection pad and the FFIC and at least one solder connection between the FFIC and the SFIC.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: October 20, 2009
    Assignee: Raytheon Company
    Inventors: Tse E. Wong, Samuel D. Tonomura, Stephen E. Sox, Timothy E. Dearden, Clifton Quan, Polwin C. Chan, Mark S. Hauhe
  • Stacked integrated circuit assembly
    Publication number: 20080179758
    Abstract: A stacked integrated circuit assembly includes a substrate having a top surface with at least one substrate connection pad. A first flip chip integrated circuit (FFIC) is disposed above the substrate, and a second flip chip integrated circuit (SFIC) is disposed above the FFIC. The FFIC is disposed between the substrate and the SFIC. The stacked integrated circuit assembly includes least one solder connection between the substrate connection pad and the FFIC and at least one solder connection between the FFIC and the SFIC.
    Type: Application
    Filed: January 25, 2007
    Publication date: July 31, 2008
    Inventors: Tse E. Wong, Samuel D. Tonomura, Stephen E. Sox, Timothy E. Dearden, Clifton Quan, Polwin C. Chan, Mark S. Hauhe