Abstract: A secure processing system includes a memory having a secure partition and a non-secure partition, a neural network processing unit (NPU) configured to initiate transactions with the memory, and a memory protection unit (MPU) configured to filter the transactions. Each of the transactions includes at least an address of the memory to be accessed, one of a plurality of first master identifiers (IDs) associated with the NPU, and security information indicating whether the NPU is in a secure state or a non-secure state when the transaction is initiated. The MPU is to selectively deny access to the secure partition of the memory based at least in part on the memory address, the first master ID, and the security information associated with each of the transactions.

Abstract: A method and apparatus for controlling access to memory is disclosed. In one implementation, a memory controller may receive a memory access request that may include a virtual memory address, a device identifier (ID) and a protected access indicator. Additionally, the memory controller can receive page table entries including a physical memory address based on the virtual memory address and a security attribute associated with the physical memory address. The memory controller may access a memory based on the physical memory address, the security attribute, the protected access indicator, and the device ID.

Abstract: A secure processing system includes a memory having a secure partition and a non-secure partition, a neural network processing unit (NPU) configured to initiate transactions with the memory, and a memory protection unit (MPU) configured to filter the transactions. Each of the transactions includes at least an address of the memory to be accessed, one of a plurality of first master identifiers (IDs) associated with the NPU, and security information indicating whether the NPU is in a secure state or a non-secure state when the transaction is initiated. The MPU is to selectively deny access to the secure partition of the memory based at least in part on the memory address, the first master ID, and the security information associated with each of the transactions.

Abstract: A secure processing system includes a memory having a secure partition and a non-secure partition, a neural network processing unit (NPU) configured to initiate transactions with the memory, and a memory protection unit (MPU) configured to filter the transactions. Each of the transactions includes at least an address of the memory to be accessed, one of a plurality of first master identifiers (IDs) associated with the NPU, and security information indicating whether the NPU is in a secure state or a non-secure state when the transaction is initiated. The MPU is to selectively deny access to the secure partition of the memory based at least in part on the memory address, the first master ID, and the security information associated with each of the transactions.

Abstract: A processing system including a processor, a first memory, a state machine configured to transition between a plurality of states, and an access filter. The first memory stores instructions that are executable by the processor, where execution of the instructions causes the processor to initiate transactions with one or more hardware resources. The access filter may filter the transactions initiated by the processor by selectively denying access to the hardware resources based at least in part on a current state of the state machine. The access filter may also filter transactions initiated by one or more of the hardware resources based at least in part on the current state of the state machine.

Abstract: A method and apparatus for controlling access to memory is disclosed. In one implementation, a memory controller may receive a memory access request that may include a virtual memory address, a device identifier (ID) and a protected access indicator. Additionally, the memory controller can receive page table entries including a physical memory address based on the virtual memory address and a security attribute associated with the physical memory address. The memory controller may access a memory based on the physical memory address, the security attribute, the protected access indicator, and the device ID.

Abstract: A processing system including a processor, a first memory, a state machine configured to transition between a plurality of states, and an access filter. The first memory stores instructions that are executable by the processor, where execution of the instructions causes the processor to initiate transactions with one or more hardware resources. The access filter may filter the transactions initiated by the processor by selectively denying access to the hardware resources based at least in part on a current state of the state machine.

Abstract: A secure processing system includes a memory having a secure partition and a non-secure partition, a neural network processing unit (NPU) configured to initiate transactions with the memory, and a memory protection unit (MPU) configured to filter the transactions. Each of the transactions includes at least an address of the memory to be accessed, one of a plurality of first master identifiers (IDs) associated with the NPU, and security information indicating whether the NPU is in a secure state or a non-secure state when the transaction is initiated. The MPU is to selectively deny access to the secure partition of the memory based at least in part on the memory address, the first master ID, and the security information associated with each of the transactions.

Abstract: Systems and methods for securing audio content in an audio system include a first operating environment executing an audio application and facilitate communications with a server, and a trusted audio processing environment having audio input/output circuitry, a digital signal processor, a tamperproof memory storing a root key serving as a hardware root-of-trust, a key derivation component configured to derive an encryption key or decryption key from the root key and seeding information associated with a server and/or the audio application, an encryption component configured to encrypt the processed audio signal producing an encrypted audio output signal which is accessible to the first operating environment which may transmit the encrypted audio output signal to the server for further processing. A decryption component is configured to decrypt protected audio content received from the server.