Patents by Inventor Pooi See Lee

Pooi See Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140367036
    Abstract: Methods for forming a graft copolymer of a poly(vinylidene fluoride)-based polymer and at least one type of electrically conductive polymer, wherein the electrically conductive polymer is grafted on the poly(vinylidene fluoride)-based polymer are provided. The methods comprise a) irradiating a poly(vinylidene fluoride)-based polymer with a stream of electrically charged particles; b) forming a solution comprising the irradiated poly(vinylidene fluoride)-based polymer, an electrically conductive monomer and an acid in a suitable solvent; and c) adding an oxidant to the solution to form the graft copolymer. Graft copolymers of a poly(vinylidene fluoride)-based polymer and at least one type of electrically conductive polymer, wherein the electrically conductive polymer is grafted on the poly(vinylidene fluoride)-based polymer, nanocomposite materials comprising the graft copolymer, and multilayer capacitors comprising the nanocomposite material are also provided.
    Type: Application
    Filed: December 7, 2012
    Publication date: December 18, 2014
    Applicant: Nanyang Technological University
    Inventors: Pooi See Lee, Vijay Kumar, Meng-Fang Lin
  • Publication number: 20140336040
    Abstract: Methods of preparing monodispersed polydopamine nano- or microspheres are provided. The methods comprise providing a solvent system comprising water and at least one alcohol having the formula R—OH, wherein R is selected from the group consisting of optionally substituted C1-C6 alkyl, optionally substituted C2-C6 alkenyl, optionally substituted C2-C6 alkynyl, optionally substituted C3-C6 cycloalkyl, optionally substituted C3-C6 cycloalkenyl, and optionally substituted C6-C7 aryl; adding dopamine to said solvent system to form a reaction mixture; and agitating said reaction mixture for a time period of 1 to 10 days to form said monodispersed polydopamine nano- or microspheres. Methods of preparing carbon and hollow metal or metal oxide nano- or microspheres using the polydopamine nano- or microspheres are also provided.
    Type: Application
    Filed: January 4, 2013
    Publication date: November 13, 2014
    Inventors: Jian Yan, Liping Yang, Xuehong Lu, Pooi See Lee
  • Patent number: 8089115
    Abstract: An organic memory device is disclosed that has an active layer, at least one charge storage layer of a film of an organic dielectric material, and nanostractures and/or nano-particles of a charge-storing material on or in the film of dielectric material. Each of the nanostructures and/or nano-particles is separated from the others of the nanostractures and/or nano-particles by the organic dielectric material of the organic dielectric film. A method of manufacturing the organic memory device is also disclosed.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: January 3, 2012
    Assignee: Nanyang Technological University
    Inventors: Wei Lin Leong, Pooi See Lee, Yeng Ming Lam, Lixin Song, Ebinazar Benjamin Namdas, G. Subodh Mhaisalkar
  • Patent number: 8080822
    Abstract: A method for fabricating a sol-gel film composition for use in a thin film transistor is disclosed. The method includes fabricating the sol-gel dielectric composition by solution processing at a temperature in the range 60° C. to 225° C. The sol-gel film made by the method, and an organic thin-film transistor incorporating the sol-gel film are also disclosed.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: December 20, 2011
    Assignees: Nanyang Technological University, Agency for Science, Technology and Research
    Inventors: Ebinazar Benjamin Namdas, Tommy Cahyadi, G. Subodh Mhaisalkar, Pooi See Lee, Zhikuan Chen, Yeng Ming Lam, Lixin Song
  • Publication number: 20090267058
    Abstract: A method for fabricating a sol-gel film composition for use in a thin film transistor is disclosed. The method BB includes fabricating the sol-gel dielectric composition by solution processing at a temperature in the range 60° C. to 225° C. The sol-gel film made by the method, and an organic thin-film Si wafer Si wafer transistor incorporating the sol-gel film are also disclosed.
    Type: Application
    Filed: May 22, 2007
    Publication date: October 29, 2009
    Inventors: Ebinazar Benjamin Namdas, Tommy Cahyadi, G. Subodh Mhaisalkar, Pooi See Lee, Zhikuan Chen, Yeng Ming Lam, Lixin Song
  • Publication number: 20090146202
    Abstract: An organic memory device is disclosed that has an active layer, at least one charge storage layer of a film of an organic dielectric material, and nanostractures and/or nano-particles of a charge-storing material on or in the film of dielectric material. Each of the nanostructures and/or nano-particles is separated from the others of the nanostractures and/or nano-particles by the organic dielectric material of the organic dielectric film. A method of manufacturing the organic memory device is also disclosed.
    Type: Application
    Filed: May 22, 2007
    Publication date: June 11, 2009
    Inventors: Wei Lin Leong, Pooi See Lee, Yeng Ming Lam, Lixin Song, Ebinazar Benjamin Namdas, G. Subodh Mhaisalkar
  • Patent number: 7030451
    Abstract: A method and apparatus for performing nickel salicidation is disclosed. The nickel salicide process typically includes: forming a processed substrate including partially fabricated integrated circuit components and a silicon substrate; incorporating nitrogen into the processed substrate; depositing nickel onto the processed substrate; annealing the processed substrate so as to form nickel mono-silicide; removing the unreacted nickel; and performing a series procedures to complete integrated circuit fabrication. This nickel salicide process increases the annealing temperature range for which a continuous, thin nickel mono-silicide layer can be formed on silicon by salicidation. It also delays the onset of agglomeration of nickel mono-silicide thin-films to a higher annealing temperature. Moreover, this nickel salicide process delays the transformation from nickel mono-silicide to higher resistivity nickel di-silicide, to higher annealing temperature.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: April 18, 2006
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Pooi See Lee, Kin Leong Pey, Alex See, Lap Chan
  • Patent number: 6890854
    Abstract: A method and apparatus for performing nickel salicidation is disclosed. The nickel salicide process typically includes: forming a processed substrate including partially fabricated integrated circuit components and a silicon substrate; incorporating nitrogen into the processed substrate; depositing nickel onto the processed substrate; annealing the processed substrate so as to form nickel mono-silicide; removing the unreacted nickel; and performing a series procedures to complete integrated circuit fabrication. This nickel salicide process increases the annealing temperature range for which a continuous, thin nickel mono-silicide layer can be formed on silicon by salicidation. It also delays the onset of agglomeration of nickel mono-silicide thin-films to a higher annealing temperature. Moreover, this nickel salicide process delays the transformation from nickel mono-silicide to higher resistivity nickel di-silicide, to higher annealing temperature.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: May 10, 2005
    Assignee: Chartered Semiconductor Manufacturing, Inc.
    Inventors: Pooi See Lee, Kin Leong Pey, Alex See, Lap Chan
  • Publication number: 20020064918
    Abstract: A method and apparatus for performing nickel salicidation is disclosed. The nickel salicide process typically includes: forming a processed substrate including partially fabricated integrated circuit components and a silicon substrate; incorporating nitrogen into the processed substrate; depositing nickel onto the processed substrate; annealing the processed substrate so as to form nickel mono-silicide; removing the unreacted nickel; and performing a series procedures to complete integrated circuit fabrication. This nickel salicide process increases the annealing temperature range for which a continuous, thin nickel mono-silicide layer can be formed on silicon by salicidation. It also delays the onset of agglomeration of nickel mono-silicide thin-films to a higher annealing temperature. Moreover, this nickel salicide process delays the transformation from nickel mono-silicide to higher resistivity nickel di-silicide, to higher annealing temperature.
    Type: Application
    Filed: November 29, 2000
    Publication date: May 30, 2002
    Inventors: Pooi See Lee, Kin Leong Pey, Alex See, Lap Chan