Patents by Inventor Poorna Kale

Poorna Kale has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11433855
    Abstract: Systems, methods and apparatuses to recognize a threat to a vehicle from a distance and generate alarms or alerts in response. For example, a camera of a vehicle in a parking state can capture an image of the surrounding of the vehicle. When a person approaching the vehicle from a distance is identified from the image, an artificial neural network evaluates, based at least in part on one or more images from the camera, the level of threat from the person approaching the vehicle. In response to the threat level being above a threshold, the vehicle can generate an alarm to deter illegal activities and/or send an alert to a remote device, such as a mobile device of an owner, driver, authorized user, or security agent.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: September 6, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Robert Richard Noel Bielby, Poorna Kale
  • Patent number: 11435946
    Abstract: Systems, methods and apparatus of intelligent wear-leveling with reduced write-amplification for data storage devices configured on autonomous vehicles. For example, a data storage device of a vehicle includes: storage media components; a controller configured to store data into and retrieve data from the storage media components according to commands received in the data storage device; an address map configured to map between: logical addresses specified in the commands received in the data storage device, and physical addresses of memory cells in the storage media components; and an artificial neural network configured to receive, as input and as a function of time, operating parameters indicative a data access pattern, and generate, based on the input, a prediction to determine an optimized operation for wear leveling among memory cells in the data storage device. The controller is configured to perform the optimized operation for wear leveling based on the prediction.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: September 6, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Robert Richard Noel Bielby, Poorna Kale
  • Patent number: 11436076
    Abstract: Systems, methods and apparatus of predictive management of failing portions of data storage media in a data storage device. For example, the data storage device can include: one or more storage media components; a controller configured to store data into, and retrieve data from, a portion of the one or more storage media components; and an artificial neural network configured to receive, as input from the controller, parameters relevant to health of the portion and generate an anomaly classification based on the input. The controller can be configured to adjust a data storage usage of the portion in response to the anomaly classification. For example, the controller can improve data reliability operations to reduce the likelihood of data loss and/or catastrophic failure.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: September 6, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Poorna Kale, Robert Richard Noel Bielby
  • Patent number: 11417373
    Abstract: A dual-port, dual function memory device can be configured to perform operations on data written to the memory device using artificial intelligence (AI) circuitry, such as a neuromorphic array and/or a deep learning accelerator (DLA), of the memory device. The memory device can include a port dedicated for communication between the AI circuitry and a host device and another port dedicated for communication between a memory array of the memory device and a host device. Performing operations, such as image processing operations, using AI circuitry of a memory device can reduce data transfers, reduce resource consumption, and offload workloads from a host device.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: August 16, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Poorna Kale, Amit Gattani
  • Publication number: 20220254400
    Abstract: Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. An integrated circuit may be configured to execute instructions with matrix operands and configured with: random access memory configured to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a connection between the random access memory and the Deep Learning Accelerator; a first interface to a memory controller of a Central Processing Unit; and a second interface to an image generator, such as a camera. While the Deep Learning Accelerator is using the random access memory to process current input to the Artificial Neural Network in generating current output from the Artificial Neural Network, the Deep Learning Accelerator may concurrently load next input from the camera into the random access memory; and at the same time, the Central Processing Unit may concurrently retrieve prior output from the random access memory.
    Type: Application
    Filed: April 26, 2022
    Publication date: August 11, 2022
    Inventors: Poorna Kale, Jaime Cummins
  • Publication number: 20220256077
    Abstract: Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. For example, a digital camera may be configured to execute instructions with matrix operands and configured with: a housing; a lens; an image sensor positioned behind the lens to generate image data of a field of view of the digital camera; random access memory to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a transceiver; and a controller configured to generate, and communicate using the transceiver to a separate computer, a description of an item or event in the field of view captured in the image data, based on an output of the Artificial Neural Network receiving the image data as an input. The separate computer may selectively request a portion of image data from the digital camera based on the processing of the description.
    Type: Application
    Filed: April 26, 2022
    Publication date: August 11, 2022
    Inventor: Poorna Kale
  • Patent number: 11409654
    Abstract: Systems, methods and apparatus of intelligent optimization of caching operations in a data storage device. For example, the data storage device can include: one or more storage media components; a controller configured to store data into and retrieve data from the one or more storage media components; a cache memory configured to cache data that is stored in the one or more storage media components; and an artificial neural network configured to receive, as input and as a function of time, operating parameters indicative a data access pattern. The artificial neural network generates, based on the input, a prediction to determine an optimized set of cache configuration parameters; and cache operations of the cache memory are configured according to the optimized set of cache configuration parameters determined based on the prediction.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: August 9, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Robert Richard Noel Bielby, Poorna Kale
  • Patent number: 11405579
    Abstract: Systems, devices, and methods related to Video Surveillance as a Service (VSaaS) are described. For example, a removable storage device, such as a secure digital (SD) memory card or a micro SD card, can be configured to run a virtual camera agent. When the removable storage device is inserted into a digital camera to provide a storage capacity for the digital camera, the agent can convert the video captured by the digital camera into video captured by a virtual camera. The virtual camera can be configured to be in compliance with the camera requirements of a VSaaS platform. Thus, a digital camera not in compliance with the platform can still be used with the platform through the deployment of the virtual camera that is enabled by the removable storage device.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: August 2, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Poorna Kale, Te-Chang Lin
  • Publication number: 20220200630
    Abstract: Systems, methods, and apparatus related to memory devices such as solid state drives. In one approach, data is received from a host system (e.g., data to be written to an SSD). The received data is encoded using a first error correction code to generate first parity data. A temperature at which memory cells of a storage device (e.g., the SSD) will store the received data is determined. In response to determining the temperature, a first portion of the received data is identified (e.g., data in memory storage that is error-prone at a predicted higher temperature that has been determined based on output from an artificial neural network using sensor(s) input). The identified first portion is encoded using a second error correction code to generate second parity data. The second error correction code has a higher error correction capability than the first error correction code. The encoded first portion, the first parity data, and the second parity data are stored in the memory cells of the storage device.
    Type: Application
    Filed: March 14, 2022
    Publication date: June 23, 2022
    Inventors: Poorna Kale, Christopher Joseph Bueb
  • Publication number: 20220197511
    Abstract: One or more usage parameter values associated with a host system are obtained. The one or more parameter values correspond to one or more operations associated with a memory sub-system. An expected time period during which a set of host data will be received from the host system is determined in view of the one or more usage parameter values. In response to a determination, in view of an indication received from the host system, that the set of host data will not be received at the expected time period, a media management operation is performed at memory units of the memory sub-system.
    Type: Application
    Filed: March 8, 2022
    Publication date: June 23, 2022
    Inventors: Poorna Kale, Ashok Sahoo
  • Patent number: 11360533
    Abstract: A system includes a data storage device and a host computing device. The data storage device includes a host interface; integrated circuit memory cells; and a processing device. The processing device is configured to execute firmware to perform operations requested by commands received via the host interface and maintenance operations identified by the processing device independent of commands received via the host interface. The host computing device is coupled to the host interface to provide commands with addresses to access the integrated circuit memory cells according to the address. In response to a request, the host computing device is configured to reduce, to below a threshold, a rate of transmitting to the host interface commands to access integrated circuit memory cells; and power up the data storage device to cause the data storage device to perform the maintenance operations.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: June 14, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Poorna Kale, Kishore Rao
  • Patent number: 11361552
    Abstract: Systems, methods and apparatus of vehicle security operations during parking. For example, a vehicle includes: a proximity sensor configured to detect presence of an object approaching the vehicle when the vehicle is in a parking state; at least one camera configured to monitor surroundings of the vehicle when the vehicle is in the parking state; and an artificial neural network configured to extract identification information of the object from images generated by the camera and determine a security classification of the presence of the object. The identification information is stored in the vehicle and/or transmitted to a server or a mobile device, in response to the security classification being in a predefined category.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: June 14, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Poorna Kale, Robert Richard Noel Bielby
  • Publication number: 20220180907
    Abstract: A dual-port, dual function memory device can be configured to perform operations on data written to the memory device using artificial intelligence (AI) circuitry, such as a neuromorphic array and/or a deep learning accelerator (DLA), of the memory device. The memory device can include a port dedicated for communication between the AI circuitry and a host device and another port dedicated for communication between a memory array of the memory device and a host device. Performing operations, such as image processing operations, using AI circuitry of a memory device can reduce data transfers, reduce resource consumption, and offload workloads from a host device.
    Type: Application
    Filed: December 9, 2020
    Publication date: June 9, 2022
    Inventors: Poorna Kale, Amit Gattani
  • Publication number: 20220180185
    Abstract: A first artificial neural network (ANN) model implemented on a memory device can be executed on first data from an imaging device corresponding to a first image. A second ANN model implemented on the memory device can be executed on second data from the imaging device corresponding to a second, subsequent image. Whether an accuracy value of results yielded from the execution of the second ANN model on the second data is less than a threshold accuracy value can be determined by the memory device. Responsive to determining that the accuracy value is less than the threshold accuracy value, the first ANN model can be executed on third data from the imaging device corresponding to a third image subsequent to the second image. Such selection of ANN models can reduce excess power consumption of a memory device on which the ANN models are implemented.
    Type: Application
    Filed: December 9, 2020
    Publication date: June 9, 2022
    Inventor: Poorna Kale
  • Patent number: 11354262
    Abstract: A solid state drive having a drive aggregator and a plurality of component solid state drives. The drive aggregator is configured to map logical addresses identified in one or more first commands into multiple logical address groups defined respectively in multiple component solid state drives. According to the one or more first commands and the logical address mapping, the drive aggregator generates multiple second commands and transmits the multiple second commands in parallel to the multiple component solid state drives to perform an operation identified by the one or more first commands.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: June 7, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Poorna Kale, Christopher Joseph Bueb
  • Patent number: 11355175
    Abstract: Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. An integrated circuit may be configured to execute instructions with matrix operands and configured with: random access memory configured to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a connection between the random access memory and the Deep Learning Accelerator; a first interface to a memory controller of a Central Processing Unit; and a second interface to an image generator, such as a camera. While the Deep Learning Accelerator is using the random access memory to process current input to the Artificial Neural Network in generating current output from the Artificial Neural Network, the Deep Learning Accelerator may concurrently load next input from the camera into the random access memory; and at the same time, the Central Processing Unit may concurrently retrieve prior output from the random access memory.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: June 7, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Poorna Kale, Jaime Cummins
  • Patent number: 11356601
    Abstract: Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. For example, a digital camera may be configured to execute instructions with matrix operands and configured with: a housing; a lens; an image sensor positioned behind the lens to generate image data of a field of view of the digital camera; random access memory to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a transceiver; and a controller configured to generate, and communicate using the transceiver to a separate computer, a description of an item or event in the field of view captured in the image data, based on an output of the Artificial Neural Network receiving the image data as an input. The separate computer may selectively request a portion of image data from the digital camera based on the processing of the description.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: June 7, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Poorna Kale
  • Publication number: 20220156559
    Abstract: Apparatuses and methods can be related to implementing bypass paths in an ANN. The bypass path can be used to bypass a portion of the ANN such that the ANN generates an output with a particular level of confidence while utilizing less resources than if the portion of the ANN had not been bypassed.
    Type: Application
    Filed: November 18, 2020
    Publication date: May 19, 2022
    Inventors: Saideep Tiku, Poorna Kale
  • Publication number: 20220159132
    Abstract: A memory device can be configured to direct communication of data from an image sensor to the memory device and/or image signal processing circuitry coupled thereto. The memory device can be configured to receive first signaling indicative of first data from an image sensor via a first port and provide the first signaling from the memory device to image signal processing (ISP) circuitry via a second port. The memory device can be configured to receiving, by the memory device, second signaling indicative of second data from the image sensor while the ISP circuitry operates on the first data. An image processing operation can be performed using logic circuitry of the memory device. Directing communication of data using the memory device can reduce data transfers, reduce resource consumption of an imaging system, and offload workloads from a host device and/or a host processing device, for example.
    Type: Application
    Filed: November 18, 2020
    Publication date: May 19, 2022
    Inventors: Poorna Kale, Richard C. Murphy, Amit Gattani
  • Publication number: 20220159180
    Abstract: A memory device can be configured to receive data, via a first port, from an image sensor coupled thereto. The memory device can be further configured to perform an image processing operation on the data. The image processing operation can be performed using logic circuitry of the memory device. The memory device can be configured to transmit operated-on data from the memory device to image signal processing (ISP) circuitry via a second port of the memory device. Pulling data directly from an image sensor, via a memory device, can reduce data transfers, reduce resource consumption, and offload workloads from ISP circuitry, a host device, and/or a host processing device, for example.
    Type: Application
    Filed: November 18, 2020
    Publication date: May 19, 2022
    Inventors: Poorna Kale, Richard C. Murphy, Amit Gattani