Patents by Inventor Pou-Yu Chiang

Pou-Yu Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100096697
    Abstract: A semiconductor device includes a semiconductor substrate, a source region and a drain region formed in the substrate, a gate structure formed on the substrate disposed between the source and drain regions, and a first isolation structure formed in the substrate between the gate structure and the drain region, the first isolation structure including projections that are located proximate to an edge of the drain region. Each projection includes a width measured in a first direction along the edge of the drain region and a length measured in a second direction perpendicular to the first direction, and adjacent projections are spaced a distance from each other.
    Type: Application
    Filed: October 22, 2008
    Publication date: April 22, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ru-Yi Su, Pou-Yu Chiang, Jeng Gong, Tsung-Yi Huang, Chun Lin Tsai, Chien-Chih Chou